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QG82915GM 데이터시트 PDF




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QG82915GM 데이터시트, 핀배열, 회로
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Intel® 852GME Chipset GMCH
and Intel® 852PM Chipset MCH
Datasheet
April 2005
www.DataSheet.in
Document Number: 253027-004




QG82915GM pdf, 반도체, 판매, 대치품
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Register Description.......................................................................................................... 63
3.1 Conceptual Overview of the Platform Configuration Structure ............................ 63
3.2 Nomenclature for Access Attributes..................................................................... 64
3.3 Standard PCI Bus Configuration Mechanism....................................................... 65
3.4 Routing Configuration Accesses .......................................................................... 65
3.4.1
3.4.2
3.4.3
PCI Bus #0 Configuration Mechanism.................................................. 65
Primary PCI and Downstream Configuration Mechanism .................... 66
AGP/PCI_B Bus Configuration Mechanism.......................................... 66
3.5 Register Definitions .............................................................................................. 67
3.6 I/O Mapped Registers .......................................................................................... 68
3.6.1 CONFIG_ADDRESS – Configuration Address Register ...................... 68
3.6.2 CONFIG_DATA – Configuration Data Register ................................... 70
3.7 Host-Hub Interface Bridge Device Registers (Device #0, Function #0)............... 71
3.7.1
3.7.2
3.7.3
3.7.4
3.7.5
3.7.6
3.7.7
3.7.8
3.7.9
3.7.10
3.7.11
3.7.12
VID – Vendor Identification Register (Device #0) ................................. 73
DID – Device Identification Register (Device #0) ................................. 73
PCICMD – PCI Command Register (Device #0) .................................. 74
PCI Status Register (Device #0)........................................................... 75
RID – Revision Identification (Device #0) ............................................. 76
SUBC – Sub Class Code Register (Device #0).................................... 76
BCC – Base Class Code Register (Device #0) .................................... 77
HDR – Header Type Register (Device #0) ........................................... 77
APBASE – Aperture Base Configuration (Device #0) .......................... 78
SVID – Subsystem Vendor Identification Register (Device #0)............ 79
SID – Subsystem Identification Register (Device #0)........................... 79
CAPPTR – Capabilities Pointer Register (Device #0) .......................... 79
3.7.13
3.7.14
3.7.15
3.7.16
3.7.17
3.7.18
3.7.19
3.7.20
3.7.21
3.7.22
3.7.23
3.7.24
3.7.25
3.7.26
3.7.27
3.7.28
3.7.29
3.7.30
3.7.31
3.7.32
3.7.33
3.7.34
3.7.35
CAPIDCapability Identification Register (Device #0) ........................ 80
RRBAR – Register Range Base Address Register (Device #0) .......... 81
GMC – GMCH Miscellaneous Control Register (Device #0)................ 82
GGC – GMCH Graphics Control Register (Device 0) .......................... 83
DAFC – Device and Function Control Register (Device 0) .................. 84
FDHC – Fixed DRAM Hole Control Register (Device #0) .................... 85
PAM(6:0) – Programmable Attribute Map Register (Device #0) .......... 85
SMRAM – System Management RAM Control Register (Device #0) .. 90
ESMRAMC – Extended System Management RAM Control
(Device #0)............................................................................................ 91
ERRSTS – Error Status Register (Device #0) ...................................... 92
ERRCMD – Error Command Register (Device #0) .............................. 93
SMICMD – SMI Error Command Register (Device #0) ........................ 94
SCICMD – SCI Error Command Register (Device #0)......................... 95
SHIC - Secondary Host Interface Control Register (Device #0) .......... 96
ACAPID – AGP Capability Identifier Register (Device #0) ................... 96
AGPSTAT – AGP Status Register (Device #0) .................................... 97
AGPCMD – AGP Command Register (Device #0)............................... 98
AGPCTRL – AGP Control Register (Device #0) .................................. 99
AFT – AGP Functional Register (Device #0)........................................ 99
APSIZE – Aperture Size (Device #0).................................................. 100
ATTBASE – Aperture Translation Table Base Register (Device #0) . 101
AMTT – AGP Interface Multi-Transaction Timer Register
(Device #0).......................................................................................... 102
LPTT – Low Priority Transaction Timer Register (Device #0) ............ 103
3.8 Main Memory Control, Memory I/O Control Registers (Device #0, Function #1)104
Datasheet

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QG82915GM 전자부품, 판매, 대치품
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5.4.2 3D Engine ........................................................................................... 181
5.4.3 Raster Engine ..................................................................................... 186
5.4.4 GMCH 2D Engine ............................................................................... 189
5.4.5 GMCH Planes and Engines................................................................ 190
5.4.6 Hardware Cursor Plane ...................................................................... 190
5.4.7 Overlay Plane ..................................................................................... 191
5.4.8 Video Functionality.............................................................................. 192
5.5 Display Interface................................................................................................. 193
5.5.1 Analog Display Port Characteristics ................................................... 193
5.5.2 Digital Display Interface ...................................................................... 194
5.6 AGP Interface Overview..................................................................................... 199
5.6.1 AGP Target Operations ...................................................................... 199
5.6.2 AGP Transaction Ordering ................................................................. 200
5.6.3 AGP Signal Levels .............................................................................. 200
5.6.4 4X AGP Protocol................................................................................. 201
5.7 Power and Thermal Management...................................................................... 204
5.8 General Description of Supported CPU States .................................................. 205
5.9 General Description of ACPI States................................................................... 205
5.10 Enhanced Intel SpeedStep® Technology Overview ........................................... 206
5.11 External Thermal Sensor Input........................................................................... 206
6 Electrical Characteristics................................................................................................. 209
6.1 Absolute Maximum Ratings................................................................................ 209
6.2 Thermal Characteristics ..................................................................................... 210
6.3 Power Characteristics ........................................................................................ 211
6.4 Signal Groups..................................................................................................... 213
6.5 DC Characteristics ............................................................................................. 216
7 Testability ........................................................................................................................ 225
7.1 XOR Chain Differential Pairs.............................................................................. 225
7.2 XOR Chain Exclusion List .................................................................................. 226
7.3 XOR Chain Connectivity/Ordering ..................................................................... 227
7.4 VCC/VSS Voltage Groups.................................................................................. 238
7.5 Power Sequence Recommendation................................................................... 239
8 Intel® 852GME GMCH and 852PM MCH Strap Pins...................................................... 241
8.1 Strapping Configuration Table............................................................................ 241
9 Ballout and Package Information .................................................................................... 243
9.1 Package Mechanical Information ....................................................................... 278
Datasheet
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관련 데이터시트

부품번호상세설명 및 기능제조사
QG82915GM

Chipset GMCH / Chipset MCH

Intel
Intel

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