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PDF STP8NC70Z Data sheet ( Hoja de datos )

Número de pieza STP8NC70Z
Descripción N-CHANNEL MOSFET
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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No Preview Available ! STP8NC70Z Hoja de datos, Descripción, Manual

STP8NC70Z - STP8NC70ZFP
STB8NC70Z - STB8NC70Z-1
N-CHANNEL 700V - 0.90- 6.8A TO-220/FP/D2PAK/I2PAK
Zener-Protected PowerMESH™III MOSFET
TYPE
VDSS
RDS(on)
ID
STP8NC70Z/FP
700V
< 1.2
6.8 A
STB8NC70Z/-1
700V
< 1.2
6.8 A
s TYPICAL RDS(on) = 0.9
s EXTREMELY HIGH dv/dt AND CAPABILITY
GATE-TO- SOURCE ZENER DIODES
s 100% AVALANCHE TESTED
s VERY LOW GATE INPUT RESISTANCE
s GATE CHARGE MINIMIZED
DESCRIPTION
The third generation of MESH OVERLAY™ Power
MOSFETs for very high voltage exhibits unsurpassed
on-resistance per unit area while integrating back-to-
back Zener diodes between gate and source. Such ar-
rangement gives extra ESD capability with higher rug-
gedness performance as requested by a large variety
of single-switch applications.
APPLICATIONS
s SINGLE-ENDED SMPS IN MONITORS,
COMPUTER AND INDUSTRIAL APPLICATION
s WELDING EQUIPMENT
TO-220
3
1
D2PAK
3
2
1
TO-220FP
123
I2PAK
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS Drain-source Voltage (VGS = 0)
VDGR
Drain-gate Voltage (RGS = 20 k)
VGS Gate- source Voltage
ID Drain Current (continuous) at TC = 25°C
ID Drain Current (continuous) at TC = 100°C
IDM (q) Drain Current (pulsed)
PTOT
Total Dissipation at TC = 25°C
Derating Factor
IGS Gate-source Current (DC)
VESD(G-S) Gate source ESD(HBM-C=100pF, R=15KΩ)
dv/dt(1) Peak Diode Recovery voltage slope
VISO
Insulation Winthstand Voltage (DC)
Tstg Storage Temperature
Tj Max. Operating Junction Temperature
(•)Pulse width limited by safe operating area
December 2002
Value
Unit
STP(B)8NC70Z(-1) STP8NC70ZFP
700 V
700 V
± 25 V
6.8
6.8(*)
A
4.3
4.3(*)
A
27
27(*)
A
135 40 W
1.08 0.32 W/°C
±50 mA
3 KV
3 V/ns
--
2000
V
–65 to 150
°C
150 °C
(1)ISD 6.8A, di/dt 100A/µs, VDD V(BR)DSS, Tj TJMAX
.(*)Pulse width Limited by maximum temperature allowed 1/13
www.DataSheet.in

1 page




STP8NC70Z pdf
Transconductance
STP8NC70Z - STP8NC70ZFP - STB8NC70Z - STB8NC70Z-1
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
Normalized Gate Threshold Voltage vs Temp.
Normalized On Resistance vs Temperature
www.DataSheet.in
5/13

5 Page





STP8NC70Z arduino
DIM.
A
A1
A2
B
B2
C
C2
D
D1
E
E1
G
L
L2
L3
M
R
V2
MIN.
4.4
2.49
0.03
0.7
1.14
0.45
1.23
8.95
10
4.88
15
1.27
1.4
2.4
STP8NC70Z - STP8NC70ZFP - STB8NC70Z - STB8NC70Z-1
D2PAK MECHANICAL DATA
mm.
TYP
8
8.5
0.4
MAX.
4.6
2.69
0.23
0.93
1.7
0.6
1.36
9.35
10.4
5.28
15.85
1.4
1.75
3.2
MIN.
0.173
0.098
0.001
0.027
0.044
0.017
0.048
0.352
0.393
0.192
0.590
0.050
0.055
0.094
inch
TYP.
0.315
0.334
0.015
MAX.
0.181
0.106
0.009
0.036
0.067
0.023
0.053
0.368
0.208
0.625
0.055
0.068
0.126
www.DataSheet.in
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