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PCA9561 데이터시트 PDF




NXP Semiconductors에서 제조한 전자 부품 PCA9561은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 PCA9561 자료 제공

부품번호 PCA9561 기능
기능 Quad 6-bit multiplexed I2C EEPROM DIP switch
제조업체 NXP Semiconductors
로고 NXP Semiconductors 로고


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PCA9561 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
PCA9561
Quad 6-bit multiplexed
I2C EEPROM DIP switch
Product data
Supersedes data of 2002 May 24
Philips
Semiconductors
www.DataSheet.in
2003 Jun 27




PCA9561 pdf, 반도체, 판매, 대치품
Philips Semiconductors
Quad 6-bit multiplexed I2C EEPROM DIP switch
Product data
PCA9561
DEVICE ADDRESS
Following a START condition the bus master must output the
address of the slave it is accessing. The address of the PCA9561 is
shown in Figure 1. To conserve power, no internal pull-up resistors
are incorporated on the hardware selectable address pins and they
must be pulled HIGH or LOW.
The last bit of the slave address byte defines the operation to be
performed. When set to logic 1 a read is selected while a logic 0
selects a write operation.
MSB
1 0 01
LSB
1 A1 A0 R/W
CONTROL REGISTER
Following the successful acknowledgement of the slave address,
the bus master will send a byte to the PCA9561, which will be stored
in the control register. This register can be written and read via the
I2C-bus.
D7 D6 D5 D4 D3 D2 D1 D0
Figure 2. Control Register
SW00954
FIXED
PROGRAMMABLE
Figure 1. Slave address
SW00955
CONTROL REGISTER DEFINITION
Following the address and acknowledge bit with logic 0 in the read/write bit, the first byte written is the command byte. If the command byte is
reserved and therefore not valid, it will not be acknowledged. Only valid command bytes will be acknowledged.
Table 1. Register Addresses
D7 D6 D5 D4 D3 D2 D1 D0
REGISTER
NAME
0 0 0 0 0 0 0 0 EEPROM 0
0 0 0 0 0 0 0 1 EEPROM 1
0 0 0 0 0 0 1 0 EEPROM 2
0 0 0 0 0 0 1 1 EEPROM 3
1 1 1 1 1 1 1 1 MUX_IN
TYPE
Read/Write
Read/Write
Read/Write
Read/Write
Read
REGISTER
FUNCTION
EEPROM byte 0
register
EEPROM byte 1
register
EEPROM byte 2
register
EEPROM byte 3
register
MUX_IN values
register
Table 2. Commands
D7 D6 D5 D4 D3 D2 D1 D0
COMMAND
1 1 1 1 1 0 0 0 MUX_OUT from EEPROM byte 0
1 1 1 1 1 1 0 0 MUX_OUT from EEPROM byte 1
1 1 1 1 1 0 X 1 MUX_OUT from EEPROM byte 2
1 1 1 1 1 1 X 1 MUX_OUT from EEPROM byte 3
1 1 1 1 1 X 1 0 MUX_OUT from MUX_IN
1 1 1 1 1 X X 1 MUX_OUT from MUX_SELECT2
NOTE:
1. All other combinations are reserved.
2. MUX_SELECT pins select between MUX_IN and EEPROM to MUX_OUT.
2003 Jun 27
www.DataSheet.in
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PCA9561 전자부품, 판매, 대치품
Philips Semiconductors
Quad 6-bit multiplexed I2C EEPROM DIP switch
Product data
PCA9561
CHARACTERISTICS OF THE I2C-BUS
The I2C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line
(SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. Data transfer may
be initiated only when the bus is not busy.
Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period of the clock pulse as
changes in the data line at this time will be interpreted as control signals (see Figure 3).
SDA
SCL
data line
stable;
data valid
change
of data
allowed
SW00363
Figure 3. Bit transfer
Start and stop conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the clock is HIGH is defined
as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the stop condition (P) (see Figure 4).
System configuration
A device generating a message is a ‘transmitter’, a device receiving is the ‘receiver’. The device initiates a transfer is the ‘master’ and the
devices which are controlled by the master are the ‘slaves’ (see Figure 5).
SDA
SDA
SCL
S
SCL
P
START condition
STOP condition
Figure 4. Definition of start and stop conditions
SW00365
SDA
SCL
MASTER
TRANSMITTER/
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER/
RECEIVER
MASTER
TRANSMITTER
Figure 5. System configuration
MASTER
TRANSMITTER/
RECEIVER
SLAVE
I2C
MULTIPLEXER
SW00366
2003 Jun 27
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