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W78L052C 데이터시트 PDF




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부품번호 W78L052C 기능
기능 8-BIT MICROCONTROLLER
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W78L052C 데이터시트, 핀배열, 회로
W78LE52C/W78L052C
8-BIT MICROCONTROLLER
Table of Contents-
1. GENERAL DESCRIPTION ......................................................................................................... 2
2. FEATURES ................................................................................................................................. 2
3. PIN CONFIGURATIONS ............................................................................................................ 3
4. PIN DESCRIPTION..................................................................................................................... 4
5. FUNCTIONAL DESCRIPTION ................................................................................................... 5
6. ON-CHIP FLASH EPROM CHARACTERISTICS..................................................................... 10
7. SECURITY BITS ....................................................................................................................... 10
8. ABSOLUTE MAXIMUM RATINGS ........................................................................................... 11
9. DC CHARACTERISTICS.......................................................................................................... 12
10. AC CHARACTERISTICS .......................................................................................................... 14
11. TIMING WAVEFORMS ............................................................................................................. 17
12. TYPICAL APPLICATION CIRCUITS ........................................................................................ 19
13. PACKAGE DIMENSIONS ......................................................................................................... 21
14. REVISION HISTORY ................................................................................................................ 23
www.DataSheet.in
Publication Release Date: April 17, 2007
- 1 - Revision A4




W78L052C pdf, 반도체, 판매, 대치품
W78LE52C/W78L052C
4. PIN DESCRIPTION
SYMBOL
DESCRIPTIONS
EXTERNAL ACCESS ENABLE: This pin forces the processor to execute out of
external ROM. It should be kept high to access internal ROM. The ROM address and
EA data will not be presented on the bus if EA pin is high and the program counter is within
on-chip ROM area.
PSEN
PROGRAM STORE ENABLE: PSEN enables the external ROM data onto the Port 0
address/ data bus during fetch and MOVC operations. When internal ROM access is
performed, no PSEN strobe signal outputs from this pin.
ALE
ADDRESS LATCH ENABLE: ALE is used to enable the address latch that separates
the address from the data on Port 0.
RST
RESET: A high on this pin for two machine cycles while the oscillator is running resets
the device.
XTAL1
CRYSTAL1: This is the crystal oscillator input. This pin may be driven by an external
clock.
XTAL2 CRYSTAL2: This is the crystal oscillator output. It is the inversion of XTAL1.
VSS GROUND: Ground potential
VDD POWER SUPPLY: Supply voltage for operation.
PORT 0: Port 0 is a bi-directional I/O port which also provides a multiplexed low order
P0.0P0.7 address/data bus during accesses to external memory. The Port 0 is also an open-drain
port and external pull-ups need to be connected while in programming.
PORT 1: Port 1 is a bi-directional I/O port with internal pull-ups. The bits have alternate
functions which are described below:
P1.0P1.7 T2(P1.0): Timer/Counter 2 external count input
T2EX(P1.1): Timer/Counter 2 Reload/Capture control
P2.0P2.7
PORT 2: Port 2 is a bi-directional I/O port with internal pull-ups. This port also provides
the upper address bits for accesses to external memory.
PORT 3: Port 3 is a bi-directional I/O port with internal pull-ups. All bits have alternate
functions, which are described below:
RXD(P3.0) : Serial Port receiver input
TXD(P3.1) : Serial Port transmitter output
INT0 (P3.2) : External Interrupt 0
P3.0P3.7 INT1(P3.3) : External Interrupt 1
T0(P3.4) : Timer 0 External Input
T1(P3.5) : Timer 1 External Input
WR (P3.6) :External Data Memory Write Strobe
RD (P3.7) : External Data Memory Read Strobe
PORT 4: Another bit-addressable bidirectional I/O port P4. P4.3 and P4.2 are alternative
P4.0P4.3 function pins. It can be used as general I/O port or external interrupt input sources
(INT2 /INT3 ).
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-4-

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W78L052C 전자부품, 판매, 대치품
W78LE52C/W78L052C
***AUXR - Auxiliary register (8EH)
- - - - - - - AO
AO: Turn off ALE output.
4. Power-off Flag
***PCON - Power control (87H)
---
POF GF1 GF0
PD
IDL
POF:
Power off flag. Bit is set by hardware when power on reset. It can be cleared by software
to determine chip reset is a warm boot or cold boot.
GF1, GF0: These two bits are general-purpose flag bits for the user.
PD: Power down mode bit. Set it to enter power down mode.
IDL: Idle mode bit. Set it to enter idle mode.
The power-off flag is located at PCON.4. This bit is set when VDD has been applied to the part. It can
be used to determine if a reset is a warm boot or a cold boot if it is subsequently reset by software.
Watchdog Timer
The Watchdog timer is a free-running timer which can be programmed by the user to serve as a
system monitor, a time-base generator or an event timer. It is basically a set of dividers that divide the
system clock. The divider output is selectable and determines the time-out interval. When the time-out
occurs a system reset can also be caused if it is enabled. The main use of the Watchdog timer is as a
system monitor. This is important in real-time control applications. In case of power glitches or electro-
magnetic interference, the processor may begin to execute errant code. If this is left unchecked the
entire system may crash. The watchdog time-out selection will result in different time-out values
depending on the clock speed. The Watchdog timer will de disabled on reset. In general, software
should restart the Watchdog timer to put it into a known state. The control bits that support the
Watchdog timer are discussed below.
Watchdog Timer Control Register
Bit: 7 6 5 4 3 2 1 0
ENW CLRW WIDL
-
- PS2 PS1 PS0
Mnemonic: WDTC
Address: 8FH
ENW : Enable watch-dog if set.
CLRW : Clear watch-dog timer and prescaler if set. This flag will be cleared automatically
WIDL : If this bit is set, watch-dog is enabled under IDLE mode. If cleared, watch-dog is disabled
under IDLE mode. Default is cleared.
PS2, PS1, PS0: Watch-dog prescaler timer select. Prescaler is selected when set PS20 as follows:
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Publication Release Date: April 17, 2007
- 7 - Revision A4

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