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PDF AN12975A Data sheet ( Hoja de datos )
| Número de pieza | AN12975A | |
| Descripción | Stereo BTL amplifier IC | |
| Fabricantes | Panasonic Semiconductor | |
| Logotipo |  |
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DATA SHEET
Part No.
Package Code No.
AN12975A
ULGA020-L-0404
www.DataSheet4U.com
Publication date: October 2008
SDE00029BEB
1
1 page  
AN12975A
Pin Descriptions
Pin No. Pin name
1 TEST2
2 SCL
3 SAD
4 VCC_D
5 LOUT_POS
6 GND_SPL
7 LOUT_NEG
8 VCC_SP
9 ROUT_NEG
10 GND_SPR
11 ROUT_POS
12 VREF_SP
13 TEST1
14 VCC
15 VREF
16 PREOUT_R
17 FB_R
18 GND
19 FB_L
20 PREOUT_L
Type
—
Input
Input / Output
Power Supply
Output
Ground
Output
Power Supply
Output
Ground
Output
Input
—
Power Supply
Input
Output
Input
Ground
Input
Output
Description
Terminal for testing (please connect to Ground)
SCL
SDA
Power supply VCC_D for logic circuit
SP amplifier L-ch. output (+)
Ground for SP L-ch. amplifier system
SP amplifier L-ch. output (–)
Power supply VCC_SP for SP output
SP amplifier R-ch. output (–)
Ground for SP R-ch. amplifier system
SP amplifier R-ch. output (+)
Terminal of reference voltage for SP output circuit
Terminal for testing (please connect to Ground)
Power supply VCC
Terminal of reference voltage
First stage amplifier output R-ch.
Negative feedback input stage amplifier R-ch.
Ground
Negative feedback input stage amplifier L-ch.
First stage amplifier output L-ch.
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SDE00029BEB
5
5 Page 
AN12975A
Technical Data (continued)
y I2C-bus Mode (continued)
1. Write Mode (continued)
(a) I2C-bus PROTOCOL
x Slave address: 10110110 (B6Hex)
x Format (normal)
S Slave address
WA
Sub address
A Data byte A P
Start
condition
Acknowledge bit
Write
Mode: 0
Stop
condition
(b) Auto increment
x Sub-address 0*Hex: Auto increment mode
(When the data is sent in sequence, the sub address will change one by one and the data will be input.)
x Auto increment mode
S
Slave address
WA
Sub address
A Data 1 A Data 2 A
Data n
AP
(c) Initial condition
The initial state of the device is not guaranteed. Therefore, the input of 00Hex resister-D0 (Note.1) will be absolutely 0, when
the power is turned ON.
(d) Sub-address Byte and Data Byte Format
MSB
Sub-address
Data byte
LSB
D7 D6 D5 D4 D3 D2 D1 D0
*0Hex
*1Hex
＊
＊
0
(Note.2)
0
(Note.2)
AGC
0 → OFF
1 → ON
SP Save
0 → ON
1 → OFF
Standby
0 → ON
1 → OFF
0
(Note.1)
AGC-ON AGC-ON AGC-ON AGC-REC AGC-REC AGC-REC AGC-ATT AGC-ATT
data bit3 data bit2 data bit1 data bit3 data bit2 data bit1 data bit2 data bit1
*2Hex
00
(Note.2) (Note.2)
0
(Note.2)
＊
＊
000
(Note.2) (Note.2) (Note.2)
<00Hex Register>
D0, D4, D5, D6, D7: Always set to 0
D1: Standby ON/OFF switch
D2: SP Save ON/OFF switch
D3: AGC ON/OFF switch
www.DataSh<e0e1t4HUex.cRomegister>
D0, D1 : AGC-attack-time selection
D2, D3, D4: AGC-recovery-time selection
D5, D6, D7: AGC-on-level selection
<02Hex Register>
D0 to D7: Always set to 0 (test&adjust mode)
0
(Note.2)
Please use these bit only Data = "0", because they are
used by our company’s final test and fine-tuning
AGC-on level.
SDE00029BEB
11
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet AN12975A.PDF ] | |
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