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ZL6105 데이터시트 PDF




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부품번호 ZL6105 기능
기능 Digital DC/DC Controller
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ZL6105 데이터시트, 핀배열, 회로
Digital DC/DC Controller with Drivers and Auto
Compensation
ZL6105
The ZL6105 is a digital power controller with integrated
MOSFET drivers. Auto compensation eliminates the need for
manual compensation design work. Adaptive performance
optimization algorithms improve power conversion efficiency.
Zilker Labs Digital-DC™ technology enables a blend of power
conversion performance and power management features.
The ZL6105 is designed to be a flexible building block for DC
power and can be easily adapted to designs ranging from a
single-phase power supply operating from a 3.3V to a
multiphase current sharing supply operating from a 12V input.
The ZL6105 eliminates the need for complicated power supply
managers as well as numerous external discrete components.
The ZL6105 uses the I2C/SMBus™ with PMBus™ protocol for
communication with a host controller and the Digital-DC bus
for communication between Zilker Labs devices.
The ZL6105 is pin for pin compatible with the ZL2008. The
POLA VOUT table and compensation table have been removed.
A new single resistor VOUT table and the Auto Compensation
feature have been added.
Related Literature
AN2032, “NLR Configuration for DDC Products”
AN2033, “Zilker Labs PMBus Command Set - DDC Products”
AN2034, “Configuring Current Sharing on the ZL2004 and
ZL2006”
AN2035, “Compensation Using CompZL™”
Features
Power Conversion
• Efficient Synchronous Buck Controller
• Auto Compensating PID Filter
• Adaptive Light Load Efficiency Optimization
• 3V to 14V Input Range
• 0.54V to 5.5V Output Range (with margin)
• ±1% Output Voltage Accuracy
• Internal 3A MOSFET Drivers
• Fast Load Transient Response
• Current Sharing and Phase Interleaving
Snapshot™ Parameter Capture
• Pb-Free (RoHs Compliant)
Power Management
• Digital Soft-start/stop
• Power-Good/Enable
• Voltage Tracking, Sequencing and Margining
• Voltage, Current and Temperature Monitoring
• I2C/SMBus Interface, PMBus Compatible
• Output Voltage and Current Protection
• Internal Non-volatile Memory (NVM)
Applications
• Servers/Storage Equipment
• Telecom/Datacom Equipment
• Power Supply Modules
EN PG PH_EN FC ILIM CFG UVLO V25 VR VDD
V
SS
VTRK
MGN
SYNC
DDC
SCL
SDA
SALRT
POWER
MANAGEMENT
NON-
VOLATILE
MEMORY
I2 C
PWM
CONTROLLER
MONITOR
ADC
LDO
DRIVER
CURRENT
SENSE
TEMP
SENSOR
BST
GH
SW
GL
VSEN+
VSEN-
ISENA
ISENB
SA
XTEMP
PGND SGND DGND
FIGURE 1. BLOCK DIAGRAM
100
VOUT = 3.3V
95 VOUT = 1.5V
90
85
80
75
70
65
60
55
VIN = 12V
fSW = 400kHz
Circuit of Figure
34
50
02 4 6 8
10 12 14 16 18 20
Load Current (A)
FIGURE 2. EFFICIENCY vs LOAD CURRENT
December 19, 2013
FN6906.5
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2011-2013. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.




ZL6105 pdf, 반도체, 판매, 대치품
ZL6105
>
VTRK
SYNC
DDC
SALRT
I2C
SDA
SCL
SA(0,1)
Input Voltage Bus
PG MGN
CFG(0,1,2)
V(0,1)
EN ILIM
SS FC(0,1)
VDD
VR
Power Management
NVM
SYNC
GEN
Digital
Compensator
D-PWM
NLR
MOSFET
Drivers
BST
SW
PLL
REFCN
DAC
Communication
ADC
ADC
Σ - VSEN
+ ISENB
ISENA
ADC
MUX
VDD
Voltage
Sensor
TEMP
Sensor
VSEN+
VSEN-
XTEMP
FIGURE 4. ZL6105 BLOCK DIAGRAM
VOUT
4 FN6906.5
December 19, 2013

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ZL6105 전자부품, 판매, 대치품
ZL6105
Absolute Maximum Ratings (Note 7)
DC Supply Voltage for VDD Pin . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 17V
MOSFET Drive Reference for VR Pin @ 120mA . . . . . . . . . . . -0.3V to 6.5V
2.5V Logic Reference for V25 Pin @ 120mA . . . . . . . . . . . . . . . -0.3V to 3V
Logic I/O Voltage for CFG(0,1,2), DDC, EN,
FC(0, 1), ILIM, MGN, PG, PH_EN, SA(0, 1), SALRT,
SCL, SDA, SS, SYNC, UVLO, V(0,1) Pins . . . . . . . . . . . . . . . . -0.3V to 6.5V
Analog Input Voltages for ISENB, VSEN, VTRK,
XTEMP Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
Analog Input Voltages for ISENA Pin . . . . . . . . . . . . . . . . . . . . . -1.5V to 30V
High Side Supply Voltage for BST Pin . . . . . . . . . . . . . . . . . . . . -0.3V to 30V
Boost to Switch Voltage for BST - SW Pins . . . . . . . . . . . . . . . . . -0.3V to 8V
High Side Drive Voltage for GH Pin
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .(VSW - 0.3V) to (VBST + 0.3V)
Low Side Drive Voltage for GL Pin . . . . . . . . . . (PGND - 0.3V) to VR + 0.3V
Switch Node for SW Pin
Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .(PGND - 0.3V) to 30V
Transient (<100ns) . . . . . . . . . . . . . . . . . . . . . . . . . . . . (PGND - 5V) to 30V
Ground Voltage Differential (DGND - SGND, PGND - SGND)
for DGND, SGND and PGND Pins . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
ESD Rating
Human Body Model (Note 8). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500V
Latch-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tested to JESD78
Thermal Information
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
36 Ld QFN (Notes 9, 10) . . . . . . . . . . . . . . .
35
5
Operating Junction Temperature Range . . . . . . . . . . . . . .-40°C to +125°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-55°C to +150°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-55°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Input Supply Voltage Range, VDD (see Figure 8)
VDD tied to VR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.0V to 5V
VR floating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 14V
Output Voltage Range (VOUT) (Note 11) . . . . . . . . . . . . . . . . . . 0.54V to 5.5V
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
7. Voltage measured with respect to SGND.
8. BST, SW pins rated at 1.5kV.
9. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
10. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
11. Includes margin limits.
Electrical Specifications VDD = 12V, TA = -40°C to +85°C unless otherwise noted. Typical values are at TA = +25°C. Boldface limits apply over
the operating temperature range, -40°C to +85°C.
PARAMETER
CONDITIONS
MIN MAX
(Note 19) TYP (Note 19) UNIT
Input and Supply Characteristics
IDD Supply Current at fSW = 200kHz
IDD Supply Current at fSW = 1.4Mhz
IDDS Shutdown Current
GH, GL no load
EN = 0V
No I2C/SMBus activity
– 16 30 mA
– 25 50 mA
– 6.5 9 mA
Vr Reference Output Voltage
V25 Reference Output Voltage
Output Characteristics
VDD > 6V, IVR < 20mA
VR > 3V, IV25 < 20mA
4.5 5.2 5.5
2.25 2.5 2.75
V
V
Output Voltage Adjustment Range (Note 12)
Output Voltage Set-point Resolution
VIN > VOUT
Set using resistors
Set using I2C/SMBus
0.6 – 5.0 V
– 10 – mV
– ±0.025 –
% FS
(Note 13)
Output Voltage Accuracy (Note 14)
Includes line, load, temp
-1 – 1 %
Vsen Input Bias Current
VSEN = 5.5V
110 200
µA
Current Sense Differential Input
Voltage (Ground Referenced)
VISENA -VISENB
-100 – 100 mV
Current Sense Differential Input Voltage (Vout
Referenced, Vout < 4.0V)
Current Sense Input Bias Current
VISENA -VISENB
Ground referenced
-50 – 50 mV
-100 – 100 µA
7 FN6906.5
December 19, 2013

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