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KSZ8841-32MQL 데이터시트 PDF




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부품번호 KSZ8841-32MQL 기능
기능 Single-Port Ethernet MAC Controller
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KSZ8841-32MQL 데이터시트, 핀배열, 회로
KSZ8841-16/32MQL/MVL/MVLI/MBL
Single-Port Ethernet MAC Controller
with Non-PCI Interface
Rev. 1.6
General Description
The KSZ8841-series single-port chip includes PCI and
non-PCI CPU interfaces, and are available in 8/16-bit and
32-bit bus designs. This datasheet describes the
KSZ8841M-series of non-PCI CPU interface chips. For
information on the KSZ8841 PCI CPU interface chips,
refer to the KSZ8841P datasheet.
The KSZ8841M is a single chip, mixed analog/digital
device offering Wake-on-LAN technology for effectively
addressing Fast Ethernet applications. It consists of a Fast
Ethernet MAC controller, an 8-bit, 16-bit, and 32-bit
generic host processor interface and incorporates a unique
dynamic memory pointer with 4-byte buffer boundary and
a fully utilizable 8KB for both TX and RX directions in host
buffer interface.
The KSZ8841M is designed to be fully compliant with the
appropriate IEEE 802.3 standards. An industrial
temperature-grade version of the KSZ8841M, the
KSZ8841MVLI, also can be ordered (see “Ordering
Information section).
LinkMD®
Physical signal transmission and reception are enhanced
through the use of analog circuitry, making the design
more efficient and allowing for lower-power consumption.
The KSZ8841M is designed using a low-power CMOS
process that features a single 3.3V power supply with 5V
tolerant I/O. It has an extensive feature set that offers
management information base (MIB) counters and CPU
control/data interfaces.
The KSZ8841M includes a unique cable diagnostics
feature called LinkMD®. This feature determines the length
of the cabling plant and also ascertains if there is an open
or short condition in the cable. Accompanying software
enables the cable length and cable conditions to be
conveniently displayed. In addition, the KSZ8841M
supports Hewlett Packard (HP) Auto-MDIX thereby
eliminating the need to differentiate between straight or
crossover cables in applications.
Functional Diagram
P 1 H P A u to
M D I/M D I-X
1 0 /1 0 0
B a s e -T /T X
PHY
H ost M AC
E m b e d d e d P ro ce sso r
In te rfa c e
8 ,1 6 , o r 3 2 -b it G e n e ric
H o s t In te rfa c e
N o n -P C I
CPU
B us
In te rfa c e
U n it
QMU
DMA
C hannel
P 1 L E D [3 :0 ]
www.DataSheet4U.com E E P R O M I / F
LE D
D riv e r
RXQ
4KB
TXQ
4KB
C o n tro l
R e g is te rs
M IB
C o u n te rs
EEPR O M
In te rfa c e
Figure 1. KSZ8841M Functional Diagram
LinkMD is a registered trademark of Micrel, Inc.
Magic Packet is a trademark of Advanced Micro Devices, Inc.
Product names used in this datasheet are for identification purposes
only and may be trademarks of their respective companies.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
October 2007
M9999-102207-1.6




KSZ8841-32MQL pdf, 반도체, 판매, 대치품
Micrel, Inc.
KSZ8841-16/32 MQL/MVL/MBL
Contents
General Description .............................................................................................................................................................. 1
Functional Diagram............................................................................................................................................................... 1
Features ................................................................................................................................................................................. 2
Network Features ........................................................................................................................................................... 2
Power Modes, Power Supplies, and Packaging............................................................................................................. 2
Applications........................................................................................................................................................................... 2
Markets................................................................................................................................................................................... 2
Ordering Information ............................................................................................................................................................ 3
Revision History .................................................................................................................................................................... 3
Pin Configuration for KSZ8841-16 Chip (8/16-Bit) ........................................................................................................... 10
Ball Configuration for KSZ8841-16 Chip (8/16-Bit) .......................................................................................................... 11
Pin Description for KSZ8841-16 Chip (8/16-Bit) ............................................................................................................... 12
Ball Description for KSZ8841-16 Chip (8/16-Bit) .............................................................................................................. 17
Pin Configuration for KSZ8841-32 Chip (32-Bit) .............................................................................................................. 21
Pin Description for KSZ8841-32 Chip (32-Bit) .................................................................................................................. 22
Functional Description ....................................................................................................................................................... 27
Functional Overview ........................................................................................................................................................... 27
Power Management ..................................................................................................................................................... 27
Power down ............................................................................................................................................................................... 27
Wake-on-LAN............................................................................................................................................................................. 27
Link Change............................................................................................................................................................................... 27
Wake-up Packet......................................................................................................................................................................... 27
Magic Packet.............................................................................................................................................................................. 27
Physical Layer Transceiver (PHY)................................................................................................................................ 28
100BASE-TX Transmit............................................................................................................................................................... 28
100BASE-TX Receive................................................................................................................................................................ 29
PLL Clock Synthesizer (Recovery)............................................................................................................................................. 29
Scrambler/De-scrambler (100BASE-TX Only) ........................................................................................................................... 29
10BASE-T Transmit ................................................................................................................................................................... 29
10BASE-T Receive .................................................................................................................................................................... 29
MDI/MDI-X Auto Crossover........................................................................................................................................................ 29
Straight Cable........................................................................................................................................................................ 30
Crossover Cable.................................................................................................................................................................... 30
Auto Negotiation......................................................................................................................................................................... 31
LinkMD Cable Diagnostics ......................................................................................................................................................... 32
Access................................................................................................................................................................................... 32
Usage .................................................................................................................................................................................... 32
Media Access Control (MAC) Operation ...................................................................................................................... 32
Inter Packet Gap (IPG)............................................................................................................................................................... 32
Back-Off Algorithm ..................................................................................................................................................................... 32
Late Collision.............................................................................................................................................................................. 32
Flow Control............................................................................................................................................................................... 32
Half-Duplex Backpressure ......................................................................................................................................................... 33
Clock Generator ......................................................................................................................................................................... 33
Bus Interface Unit (BIU)................................................................................................................................................ 33
Supported Transfers .................................................................................................................................................................. 33
www.DataPShheyestic4aUl.cDoamta Bus Size .............................................................................................................................................................. 33
Asynchronous Interface ............................................................................................................................................................. 35
Synchronous Interface ............................................................................................................................................................... 36
BIU Summation .......................................................................................................................................................................... 36
BIU Implementation Principles ................................................................................................................................................... 37
Queue Management Unit (QMU).................................................................................................................................. 38
Transmit Queue (TXQ) Frame Format ....................................................................................................................................... 38
October 2007
4 M9999-102207-1.6

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KSZ8841-32MQL 전자부품, 판매, 대치품
Micrel, Inc.
KSZ8841-16/32 MQL/MVL/MBL
Address Latching Timing for All Modes...................................................................................................................................... 92
Synchronous Timing in Burst Write (VLBUSN = 1) .................................................................................................................... 93
Synchronous Timing in Burst Read (VLBUSN = 1) .................................................................................................................... 94
Synchronous Write Timing (VLBUSN = 0) ................................................................................................................................. 95
Synchronous Read Timing (VLBUSN = 0) ................................................................................................................................. 96
Auto Negotiation Timing............................................................................................................................................................. 97
Reset Timing.............................................................................................................................................................................. 98
EEPROM Timing........................................................................................................................................................................ 99
Selection of Isolation Transformers................................................................................................................................ 100
Selection of Reference Crystal ........................................................................................................................................ 100
Package Information ......................................................................................................................................................... 101
Acronyms and Glossary................................................................................................................................................... 104
www.DataSheet4U.com
October 2007
7 M9999-102207-1.6

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KSZ8841-32MQL

Single-Port Ethernet MAC Controller

Micrel Semiconductor
Micrel Semiconductor
KSZ8841-32MQL

Single-Port Ethernet MAC Controller

Micrel Semiconductor
Micrel Semiconductor

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