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P5CC073XS 데이터시트 PDF




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부품번호 P5CC073XS 기능
기능 Secure dual interface and contact PKI smart card controller
제조업체 NXP Semiconductors
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P5CC073XS 데이터시트, 핀배열, 회로
P5Cx012/02x/40/73/80/144
family
Secure dual interface and contact PKI smart card controller
Rev. 03 — 24 January 2008
Objective short data sheet
1. General description
www.DataSheet4U.net
1.1 SmartMX family approach
The new CMOS14 SmartMX family members feature a modular set of devices with:
12 KB to 144 KB EEPROM
200 KB user ROM
6144 B RAM
High-performance secured Public Key Infrastructure (PKI) coprocessor (RSA, ECC)
Secured dual/triple-DES coprocessor
Secured AES coprocessor
Memory Management Unit (MMU)
ISO/IEC 7816 contact interface
Optional ISO/IEC 14443 A Contactless Interface Unit (CIU)
Optional S2C interface for NFC communication link
5-metal-layer 0.14 µm CMOS technology
EEPROM with typical 500000 cycles endurance and minimum 20 years retention time
Broad spectrum of delivery types
Optional certified crypto library modules for RSA, ECC, DES, AES, SHA and PRNG
1.2 SmartMX family properties
The long-term approved SmartMX family features a significantly enhanced secure smart
card IC architecture. Extended instructions for Java and C code, linear addressing, high
speed at low power and a universal memory management unit are among many other
improvements added to the classic 80C51 core architecture. The technology transfer step
from 5-metal-layer 0.18 µm to 5-metal-layer 0.14 µm CMOS technology offers now even
more advantages in terms of security features, memory resources, crypto coprocessor
calculation speed for RSA and ECC as well as availability of secure hardware support for
2/3-key Digital Encryption Standard (DES) and Advanced Encryption Standard (AES)
operations.
The availability of contact interface, optional contactless or S2C interface enables the easy
implementation of native or open platform and multi-application operating systems in
market segments like e.g. banking, E-passport, ID card, Health Card, secure access, Java
card, Near Field Communication (NFC) connectable mobile hand sets as well as Trusted
Platform Modules (TPM).




P5CC073XS pdf, 반도체, 판매, 대치품
NXP Semiconductors
P5Cx012/02x/40/73/80/144 family
Secure dual interface and contact PKI smart card controller
www.DataSheet4U.net
1.6 Security features
SmartMX incorporates a big range of both inherent and OS controlled security features as
counter measure against all types of attacks. NXP Semiconductors has used the deep
knowledge of chip security, combined with the used handshaking circuit technology, the
very dense 5-metal-layer 0.14 µm technology, glue logic and active shielding methodology
for optimum results in CC EAL5+, EMVCo and other third party certifications and
approvals.
SmartMX Memory Management Unit (MMU), designed to define various memory
segments and assign security attributes accordingly, supports a strong firewall concept
that keeps different applications separate from each other. Only the System mode has full
access privileges to all memory space and on-chip peripherals, while the User mode only
has privileges defined upon card personalization and executed under the control of the
System mode.
1.7 Security evaluation and certificates
The reached target of the certification is CC EAL5+. Also third party approvals like e.g.
EMVCo (Visa, CAST), ZKA and others, depending on the application requirements, are
available.
NXP Semiconductors continues to drive forward third party security evaluations to provide
its customers with the relevant information and documentation needed to execute
subsequent composite evaluations of implemented applications.
1.8 Optional crypto library
NXP Semiconductors will offer for all family types an optional crypto library:
Various algorithms
AES encryption and decryption using the AES coprocessor
DES and Triple-DES encryption and decryption using the DES coprocessor
RSA encryption and decryption, signature generation and verification for
straightforward and CRT keys up to 5024 bits
RSA key generation
ECC over GF(p) signature generation and verification (ECDSA) and Diffie-Hellman
key exchange for keys up to 544 bits
ECC over GF(p) key generation
ECC over GF(2n) signature generation and verification (ECDSA) and
Diffie-Hellman key exchange for keys up to 571 bits
ECC over GF(2n) key generation
SHA-1, SHA-224 and SHA-256 hash algorithm
Pseudo-Random Number Generator (PRNG)
Easy to use API for all algorithms
Secure operation in contact as well as in the contactless mode
Latest built-in security features to avoid power (SPA/DPA), timing and fault attacks
(DFA)
P5CX012_02X_40_73_80_144_FAM_SDS_3
Objective short data sheet
Rev. 03 — 24 January 2008
© NXP B.V. 2008. All rights reserved.
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P5CC073XS 전자부품, 판매, 대치품
NXP Semiconductors
P5Cx012/02x/40/73/80/144 family
Secure dual interface and contact PKI smart card controller
www.DataSheet4U.net
2.3 Security features
I Enhanced security sensors:
N Low and high clock frequency sensor
N Low and high temperature sensor
N Low and high supply voltage sensor
N Single Fault Injection (SFI) attack detection
N Light sensors (included integrated memory light sensor functionality)
I Electronic fuses for safeguarded mode control
I Active shielding
I Unique ID for each die
I Clock input filter for protection against spikes
I Power-up and power-down reset
I Optional programmable card disable feature
I Memory security (encryption and physical measures) for RAM, EEPROM and ROM
I Memory Management Unit (MMU) including memory protection:
N Secure multi application operating systems via two different operation modes:
System mode and User mode
N OS controlled access restriction mechanism to peripherals in User mode
N Memory mapping up to 8-MB code memory
N Memory mapping up to 8-MB (64-kbit) data memory
I Optional disabling of ROM read instructions by code executed in EEPROM
I Optional disabling of any code execution out of RAM
I EEPROM programming:
N No external clock
N Hardware sequencer controlled
N On-chip high voltage generation
N Enhanced error correction mechanism
I 64-B or 128-B EEPROM for customer-defined Security FabKey. Featuring batch, wafer
or die-individual security data, included encrypted diversification features on request
I 14 B user write protected security area in EEPROM (byte access, inhibit functionality
per byte)
I 32 B write once security area in EEPROM (bit access)
I 32 B user read only area in EEPROM (byte access)
I Customer specific EEPROM initialization available
P5CX012_02X_40_73_80_144_FAM_SDS_3
Objective short data sheet
Rev. 03 — 24 January 2008
© NXP B.V. 2008. All rights reserved.
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부품번호상세설명 및 기능제조사
P5CC073XS

Secure dual interface and contact PKI smart card controller

NXP Semiconductors
NXP Semiconductors

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