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71M6543H PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 71M6543H
기능 Energy Meter ICs
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71M6543H 데이터시트, 핀배열, 회로
A Maxim Integrated Products Brand
19-5375; Rev 1.2; 4/11
71M6543F/H and 71M6543G/GH
Energy Meter ICs
DATA SHEET
April 2011
GENERAL DESCRIPTION
FEATURES
The 71M6543F, 71M6543H, 71M6543G, and 71M6543GH are
Teridian’s 4th-generation polyphase metering systems-on-chips
(SoCs) with a 5MHz 8051-compatible MPU core, low-power real-
time clock (RTC) with digital temperature compensation, flash
memory, and LCD driver. Our Single Converter Technology® with
a 22-bit delta-sigma ADC, seven analog inputs, digital metrology
temperature compensation, precision voltage reference, and a 32-
bit computation engine (CE) supports a wide range of metering
applications with very few external components.
The 71M6543F, 71M6543H, 71M6543G and 71M6543GH support
optional interfaces to the 71M6xx3 series of isolated sensors that
offer BOM cost reduction, immunity to magnetic tamper, and
enhanced reliability. The ICs feature ultra-low-power operation in
active and battery modes, 5KB shared RAM, and 64KB
(71M6543F, 71M6543H) or 128KB (71M6543G, 71M6543GH) of
flash memory, which can be programmed with code and/or data
during meter operation. High processing and sampling rates
combined with differential inputs offer a powerful metering platform
for commercial and industrial meters with up to class 0.2 accuracy
(71M6543H, 71M6543GH).
A complete array of code development tools, demonstration code,
and reference designs enable rapid development and certification of
meters that meet all ANSI and IEC electricity metering standards
worldwide.
0.1% Accuracy Over 2000:1 Current Range
Exceeds IEC 62053/ANSI C12.20 Standards
Seven Sensor Inputs with Neutral Current
Measurement, Differential Mode Selectable
for Current Inputs
Selectable Gain of 1 or 8 for One Current
Input to Support Shunts
High-Speed Wh/VARh Pulse Outputs with
Programmable Width
64KB Flash, 5KB RAM (71M6543F/H)
128KB Flash, 5KB RAM (71M6543G/GH)
Up to Four Pulse Outputs with Pulse Count
Four-Quadrant Metering, Phase Sequencing
Digital Temperature Compensation:
Metrology Compensation
Accurate RTC for TOU Functions with
Automatic Temperature Compensation
for Crystal in All Power Modes
Independent 32-Bit Compute Engine
46-64Hz Line Frequency Range with the Same
Calibration
Shunt Current Sensors
C
NEUTRAL
B
A
LOAD
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POWER SUPPLY
NEUTRAL
Note: This system is referenced to Neutral
3x TERIDIAN
71M6xx3
Pulse Transformers
AMR
IR
HOST
MUX and ADC
IADC0
IADC1
}IN*
VADC10 (VC)
IADC6
IADC7
}IC
VADC9 (VB)
IADC4
IADC5
}IB
VADC8 (VA)
IADC2
IADC3
}IA
V3P3A V3P3SYS GNDA GNDD
TERIDIAN
PWR MODE
CONTROL
71M6543F/ WAKE-UP
71M6543H/ REGULATOR
71M6543G/
VBAT
71M6543GH VBAT_RTC
TEMPERATURE BATTERY
SENSOR
MONITOR
VREF
SERIAL PORTS
TX
RX
MODUL- RX
ATOR TX
POWER FAULT
COMPARATOR
SPI INTERFACE
RAM
COMPUTE
ENGINE
FLASH
MEMORY
MPU
RTC
TIMERS
ICE
COM0...5
SEG
SEG/DIO
LCD DRIVER
DIO, PULSES
DIO
V3P3D
OSCILLATOR/
PLL XIN
XOUT
*IN = Neutral Current
9/17/2010
BATTERY
RTC
BATTERY
LCD DISPLAY
8888.8888
PULSES,
DIO
I2C or µWire
EEPROM
32 kHz
Single Converter Technology is a registered trademark of Maxim Integrated
Products, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
Phase Compensation (±7°)
Three Battery-Backup Modes:
Brownout Mode
LCD Mode
Sleep Mode
Wake-Up on Pin Events and Wake-on-Timer
1µA in Sleep Mode
Flash Security
In-System Program Update
8-Bit MPU (80515), Up to 5MIPS
Full-Speed MPU Clock in Brownout Mode
LCD Driver:
6 Common Segment Drivers
Up to 56 Selectable Pins
Up to 51 Multifunction DIO Pins
Hardware Watchdog Timer (WDT)
I2C/MICROWIRE™ EEPROM Interface
SPI Interface with Flash Program Capability
Two UARTs for IR and AMR
IR LED Driver with Modulation
Industrial Temperature Range
100-Pin Lead-Free LQFP Package
v1.2 © 2008–2011 Teridian Semiconductor Corporation 1




71M6543H pdf, 반도체, 판매, 대치품
71M6543F/H and 71M6543G/GH Data Sheet
5.4.8 CE Transfer Variables ............................................................................................. 125
5.4.9 Pulse Generation..................................................................................................... 127
5.4.10 CE Calibration Parameters ...................................................................................... 130
5.4.11 CE Flow Diagrams .................................................................................................. 131
6 71M6543 Specifications............................................................................................................. 133
6.1 Absolute Maximum Ratings................................................................................................. 133
6.2 Recommended External Components ................................................................................. 134
6.3 Recommended Operating Conditions.................................................................................. 134
6.4 Performance Specifications................................................................................................. 135
6.4.1 Input Logic Levels ................................................................................................... 135
6.4.2 Output Logic Levels................................................................................................. 135
6.4.3 Battery Monitor........................................................................................................ 136
6.4.4 Temperature Monitor............................................................................................... 137
6.4.5 Supply Current ........................................................................................................ 138
6.4.6 V3P3D Switch ......................................................................................................... 139
6.4.7 Internal Power Fault Comparators ........................................................................... 139
6.4.8 2.5 V Voltage Regulator – System Power ................................................................ 139
6.4.9 2.5 V Voltage Regulator – Battery Power................................................................. 140
6.4.10 Crystal Oscillator ..................................................................................................... 140
6.4.11 Phase-Locked Loop (PLL) ....................................................................................... 140
6.4.12 LCD Drivers ............................................................................................................ 140
6.4.13 VLCD Generator...................................................................................................... 140
6.4.14 71M6543 VREF....................................................................................................... 143
6.4.15 ADC Converter........................................................................................................ 144
6.4.16 Pre-Amplifier for IADC0-IADC1................................................................................ 145
6.5 Timing Specifications .......................................................................................................... 146
6.5.1 Flash Memory ......................................................................................................... 146
6.5.2 SPI Slave ................................................................................................................ 146
6.5.3 EEPROM Interface.................................................................................................. 146
6.5.4 RESET Pin.............................................................................................................. 147
6.5.5 Real-Time Clock (RTC) ........................................................................................... 147
6.6 Typical Performance Data.........................................................Error! Bookmark not defined.
6.7 100-Pin LQFP Package Outline Drawing............................................................................. 148
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6.8 71M6543 Pinout.................................................................................................................. 149
6.9 71M6543 Pin Descriptions................................................................................................... 150
6.9.1 71M6543 Power and Ground Pins ........................................................................... 150
6.9.2 71M6543 Analog Pins ............................................................................................. 151
6.9.3 71M6543 Digital Pins............................................................................................... 152
6.9.4 I/O Equivalent Circuits ............................................................................................. 154
7 Ordering Information ................................................................................................................. 155
7.1 71M6543 Ordering Guide.................................................................................................... 155
8 Related Information ................................................................................................................ 155
9 Contact Information ................................................................................................................ 155
Appendix A: Acronyms ..................................................................................................................... 156
Appendix B: Revision History........................................................................................................... 157
4
© 2008–2011 Teridian Semiconductor Corporation
v1.2

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71M6543H 전자부품, 판매, 대치품
71M6543F/H and 71M6543G/GH Data Sheet
Table 49: Data/Direction Registers and Internal Resources for SEGDIO0 to SEGDIO15........................ 60
Table 50: Data/Direction Registers for SEGDIO16 to SEGDIO31........................................................... 61
Table 51: Data/Direction Registers for SEGDIO32 to SEGDIO45........................................................... 61
Table 52: Data/Direction Registers for SEGDIO51 to SEGDIO55........................................................... 61
Table 53: LCD_VMODE Configurations .................................................................................................. 63
Table 54: LCD Configurations................................................................................................................ 64
Table 55: LCD Data Registers for SEGDIO46 to SEGDIO55.................................................................. 65
Table 56: EECTRL Bits for 2-pin Interface............................................................................................... 66
Table 57: EECTRL Bits for the 3-wire Interface ....................................................................................... 67
Table 58: SPI Transaction Fields ........................................................................................................... 69
Table 59: SPI Command Sequences ..................................................................................................... 70
Table 60: SPI Registers......................................................................................................................... 70
Table 61: TMUX[4:0] Selections ............................................................................................................ 73
Table 62: TMUX2[4:0] Selections........................................................................................................... 74
Table 63: Available Circuit Functions ..................................................................................................... 77
Table 64: VSTAT[2:0] (SFR 0xF9[2:0]) ................................................................................................... 80
Table 65: Wake Enable and Flag Bits .................................................................................................... 82
Table 66: Wake Bits .............................................................................................................................. 83
Table 67: Clear Events for WAKE flags.................................................................................................. 84
Table 68: GAIN_ADJn Compensation Channels (Figure 2, Figure 31, Table 1) ...................................... 91
Table 69: GAIN_ADJx Compensation Channels (Figure 3, Figure 32, Table 2) ...................................... 93
Table 70: I/O RAM Map – Functional Order, Basic Configuration ........................................................... 98
Table 71: I/O RAM Map – Functional Order ......................................................................................... 100
Table 72: I/O RAM Map – Alphabetical Order ...................................................................................... 104
Table 73: Info Page Trim Fuses........................................................................................................... 118
Table 74: CE EQU[2:0] Equations and Element Input Mapping ............................................................ 121
Table 75: CE Raw Data Access Locations ........................................................................................... 122
Table 76: CESTATUS Register.............................................................................................................. 123
Table 77: CESTATUS Bit Definitions...................................................................................................... 123
Table 78: CECONFIG Register............................................................................................................. 123
Table 79: CECONFIG Bit Definitions (CE RAM 0x20) ........................................................................... 124
Table 80: Sag Threshold, Phase Measurement, and Gain Adjust Control............................................. 125
Table 81: CE Transfer Variables (with Shunts)..................................................................................... 125
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Table 82: CE Transfer Variables (with CTs) ......................................................................................... 126
Table 83: CE Energy Measurement Variables (with Shunts)................................................................. 126
Table 84: CE Energy Measurement Variables (with CTs) ..................................................................... 126
Table 85: Other Transfer Variables ...................................................................................................... 127
Table 86: CE Pulse Generation Parameters......................................................................................... 128
Table 87: CE Parameters for Noise Suppression and Code Version..................................................... 129
Table 88: CE Calibration Parameters................................................................................................... 130
Table 89: Absolute Maximum Ratings.................................................................................................. 133
Table 90: Recommended External Components .................................................................................. 134
Table 91: Recommended Operating Conditions................................................................................... 134
Table 92: Input Logic Levels ................................................................................................................ 135
Table 93: Output Logic Levels ............................................................................................................. 135
Table 94: Battery Monitor Performance Specifications (TEMP_BAT = 1) ............................................... 136
Table 95: Temperature Monitor............................................................................................................ 137
Table 96: Supply Current Performance Specifications.......................................................................... 138
Table 98: Internal Power Fault Comparators Performance Specifications............................................. 139
Table 99: 2.5 V Voltage Regulator Performance Specifications ............................................................ 139
v1.2
© 2008–2011 Teridian Semiconductor Corporation
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