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부품번호 U426
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U426 데이터시트, 핀배열, 회로
U426
HIGH INPUT IMPEDANCE
MONOLITHIC DUAL
N-CHANNEL JFET
Linear Systems replaces discontinued Siliconix U426
The U426 is a high input impedance Monolithic Dual N-Channel JFET
The U426 monolithic dual n-channel JFET is designed
to provide very high input impedance for differential
amplification and impedance matching. Among its
many unique features, this series offers operating gate
current specified at -500 fA. The U426 is a direct
replacement for discontinued Siliconix U426.
FEATURES 
HIGH INPUT IMPEDANCE 
HIGH GAIN 
LOW POWER OPERATION 
ABSOLUTE MAXIMUM RATINGS  
@ 25°C (unless otherwise noted) 
IG = 0.25pA MAX 
gfs = 120µmho MIN 
VGS(OFF) = 2V MAX 
The hermetically sealed TO-71 & TO-78 packages are
well suited for military applications. The 8 Pin P-DIP
and 8 Pin SOIC provide ease of manufacturing, and the
symmetrical pinout prevents improper orientation.
Maximum Temperatures 
Storage Temperature 
65°C to +150°C 
Operating Junction Temperature 
+150°C 
Maximum Voltage and Current for Each Transistor  Note 1 
(See Packaging Information).
VGSS 
VDSO 
IG(f) 
Gate Voltage to Drain or Source 
Drain to Source Voltage 
Gate Forward Current 
40V 
40V 
10mA 
U426 Applications:
Maximum Power Dissipation 
Device Dissipation @ Free Air  Total                 400mW @ +125°C 
ƒ Ultra Low Input Current Differential Amps
ƒ High-Speed Comparators
ƒ Impedance Converters
MATCHING CHARACTERISTICS @ 25°C UNLESS OTHERWISE NOTED
SYMBOL 
CHARACTERISTICS  VALUE  UNITS  CONDITIONS 
|V GS12 /T|max. 
| V GS12 | max. 
DRIFT VS. 
TEMPERATURE 
OFFSET VOLTAGE 
40  µV/°C  VDG=10V, ID=30µA 
TA=55°C to +125°C 
25  mV  VDG=10V, ID=30µA 
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL 
CHARACTERISTICS 
MIN. 
TYP.  MAX. 
UNITS 
CONDITIONS 
BVGSS 
Breakdown Voltage 
40  60  ‐‐ 
V 
VDS = 0                  IG =1nA 
BVGGO 
 
YfSS 
YfS 
Click 
GateToGate Breakdown 
TRANSCONDUCTANCE 
Full Conduction 
Typical Operation 
DRAIN CURRENT 
40 
 
300 
120 
 
IDSS 
Full Conduction 
60 
To Buy‐‐  ‐‐ 
  
‐‐  1500 
200  350 
  
V 
 
µmho 
µmho 
 
      IG = 1µA               ID = 0               IS= 0 
 
VDS = 10V         VGS = 0V      f = 1kHz 
     VDG = 10V          ID = 30µA    f = 1kHz 
 
‐‐  1000 
µA 
VDS = 10V              VGS = 0V 
 
GATE VOLTAGE 
    
 
 
VGS(off) 
Pinchoff voltage 
‐‐  ‐‐  2.0 
V 
VDS = 10V               ID = 1nA 
VGS 
Operating Range 
‐‐  ‐‐  1.8 
V              VDG = 10V                 ID = 30µA 
 
GATE CURRENT 
    
 
 
IGmax. 
IGmax. 
IGSSmax. 
IGSSmax. 
Operating 
High Temperature 
At Full Conduction 
High Temperature 
‐‐  ‐‐  .25 
‐‐  ‐‐  250 
‐‐  ‐‐  1.0 
‐‐  ‐‐  1.0 
pA    VDG = 10V               ID = 30µA 
pA  TA = +125°C
 
pA  VDS = 0V             VGS = 20V 
nA  TA = +125°C 
 
 
OUTPUT CONDUCTANCE 
 
  
 
 
YOSS  Full Conduction  ‐‐ 
YOS  Operating  ‐‐ 
 
COMMON MODE REJECTION 
 
‐‐  10 
0.1  3.0 
  
µmho 
µmho 
 
VDS = 10V              VGS = 0V 
 VDG =  10V             ID = 30µA 
 
CMR 
20 log | ∆V GS12/ ∆VDS| 
‐‐ 
90  ‐‐ 
  ‐20 log | ∆V GS12/ ∆VDS|  ‐‐  90  ‐‐ 
 
NOISE 
    
NF  Figure  ‐‐  ‐‐  1 
dB  ∆VDS = 10 to 20V        ID = 30µA 
dB  ∆VDS = 5 to 10V          ID = 30µA 
  VDG = 10V     ID = 30µA     RG = 10MΩ 
dB  f = 10Hz            
en 
Voltage 
‐‐ 
20  70 
nV/Hz 
    VDG = 10V     ID = 30µA      f = 10Hz   
 
 
‐‐  10  ‐‐ 
      VDG  = 10V    ID = 30µA      f = 1KHz   
 
CAPACITANCE 
    
 
 
CISS  Input 
CRSS  Reverse Transfer 
‐‐  ‐‐  3.0 
‐‐  ‐‐  1.5 
pF 
pF 
VDS= 10V       VGS = 0     f = 1MHz 
 
Note 1 – These ratings are limiting values above which the serviceability of any semiconductor may be impaired
Available Packages:
TO-71 / TO-78 (Top View)
P-DIP / SOIC (Top View)
U426 in TO-71 & TO-78
U426 in PDIP & SOIC
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Email: chipcomponents@micross.com
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.






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