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PDF L4969 Data sheet ( Hoja de datos )

Número de pieza L4969
Descripción SYSTEM VOLTAGE REGULATOR WITH FAULT TOLERANT LOW SPEED CAN-TRANSCEIVER
Fabricantes STMicroelectronics 
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L4969
SYSTEM VOLTAGE REGULATOR
WITH FAULT TOLERANT LOW SPEED CAN-TRANSCEIVER
PRELIMINARY DATA
s OPERATING SUPPLY VOLTAGE 6V TO 28V,
TRANSIENT UP TO 40V
s LOW QUIESCENT CURRENT CONSUMP-
TION, LESS THAN 40µA IN SLEEP MODE
s TWO VERY LOW DROP VOLTAGE
REGULATORS 5V / 200mA
AND 5V/200mA
s SEPARATE VOLTAGE REGULATOR FOR
CAN-TRANSCEIVER SUPPLY WITH LOW
POWER SLEEP MODE
s EFFICIENT UC SUPERVISION AND RESET
LOGIC
s 24 BIT SERIAL INTERFACE
s AN UNPOWERED OR INSUFFICIENTLY
SUPPLIED NODE DOES NOT DISTURB THE
BUS LINES
s VS VOLTAGE SENSE COMPARATOR
s SUPPORTS TRANSMISSION WITH
GROUNDSHIFT:
SINGLE WIRE: 1.5V, DIFFERENTIAL: 3V
SO20
PowerSO20
ORDERING NUMBERS: L4969MD (SO20)
L4969 (PowerSO20)
DESCRIPTION
The L4969 is an integrated circuit containing 3 inde-
pendent Voltage Regulators and a standard fault tol-
erant low speed CAN line interface in multipower
BCD3S process.
It integrates all main local functions for automotive body
electronic applications connected to a CAN bus.
Figure 1. Block Diagram
VS
V1
VREG 1
V2 VREG 2
V3 VREG 3
Watchdog and
adjustable RC-Oscillator
Identifier Filter
NRESET
WAKE
RX
Control and Status Memory
NINT
TX
CANH
RTH
CANL
RTL
Fault tolerant
low speed
CAN-transceiver
24 Bit SPI
SCLK
SIN
SOUT
August 2003
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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L4969 pdf
L4969
Table 4. Electrical Characteristics (continued)
VS = 14V, Tj = -40°C to 150°C unless otherwise specified.
Symbol
tWDswS
Parameter
Watchdog window start
(Software window Watchdog)
tWDswE
Watchdog window end
(Software window watchdog)
tWD1C System Watchdog 1
tWD2C System Watchdog 2
VRESL Reset output LOW voltage
RPURES Internal Reset Pull-Up
Resistance
CAN Line Interface
tdrd Propagation delay
(rec to dom state)
tddr Propagation delay
(dom to rez state)
SRD Bus output slew rate (r -> d)
RRTH, RRTL external Termination
resistance
(application limit)
VCCFS
Force Standby mode (fail
safe)
VHRXD
High level output voltage on
RXD
VLRXD
Low level output voltage on
RXD
Vd_r
Vr_d
Differential receiver
dom to rec threshold
VCANH - VCANL
Differential receiver
rez to dom threshold
VCANH - VCANL
Test Conditions
SWT = 0 (2.5ms)
SWT = 1 (5ms)
SWT = 2 (10ms)
SWT = 3 (20ms)
SWT = 0 (5ms)
SWT = 1 (10ms)
SWT = 2 (20ms)
SWT = 3 (40ms)
WDT = 0 (80ms)
WDT = 1 (160ms)
WDT = 2 (320ms)
WDT = 3 (640ms)
WDT = 4 (800ms)
WDT = 8 (1s)
WDT = 9 (2s)
WDT = 10 (4s)
WDT = 11 (8s)
WDT = 12 (45min)
IRES = 500u, V1 = 2.5V
IRES = 500u, V1 = 1.5V
Cload = 3.3n
Cload = 3.3n,
RTERM =100
10% ... 90%
CLoad = 3.3n
min VS to turn off CAN-IF and
V3
No bus failures
No bus failures
Min.
0
0
80
Typ.
1
2
4
8
2
4
8
16
32
64
128
256
320
400
784
1600
3200
1081344
0.3
0.85
120
Max.
0.4
1.4
280
0.4 1.0 1.5
0.4 1.0 2.0
458
0.5 16
2.20
V1 - 0.9
0
-3.85
4.0
V1
0.9
-2.50
-3.50
-2.20
Unit
tWDC
tWDC
tWDC
tWDC
tWDC
tWDC
tWDC
tWDC
tWDC
tWDC
tWDC
tWDC
tWDC
tWDC
tWDC
tWDC
tWDC
tWDC
V
V
K
µs
µs
V/µs
K
V
V
V
V
V
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L4969 arduino
L4969
1.3 CAN Transceiver
– Supports double wire unshielded busses
– Baud rate up to 125KBaud
– Short circuit protection (battery, ground, wires shorted)
– Single wire operation possible (automatic switching to single wire upon bus failures)
– Bus not loaded in case of unpowered transceiver
The CAN transceiver stage is able to transfer serial data on two independent communication wires either def-
erentially (normal operation) or in case of a single wire fault on the remaining line. The physical bitcoding is done
using dominant (transmitter active) and overwritable recessive states. Too long dominant phases are detected
internally and further transmission is automatically disabled (malfunction of protocol unit does not affect com-
munication on the bus, "fail-safe" - mechanism). For low current consumption during bus inactivity a sleep mode
is available. The operating mode can be entered from the sleep mode either by local wake up (µC) or upon de-
tection of a dominant bit on the CAN-bus (external wake up).
Ten different errors on the physical buslines can be distinguished:
1.3.1 Detectable Physical Busline Failures
N Type of Errors
Conditions
Errors caused by damage of the datalines or isolation
I CANH wire interrupted (tied to Ground or termination)
II CANL wire interrupted (floating or tied termination)
Edgecount difference > 3
Edgecount difference > 3
III CANH short circuit to VBAT (overvoltage condition)
IV CANL short circuit to GND (permanently dominant)
V(CANH) > 7.2V after 32us
V(CANL) < 3.1V & V(CANH)-V(CANL)
< -3.25V after 1.3ms
V CANH short circuit to GND (permanently recessive)
Edgecount difference > 3
VI CANL short circuit to VBAT (overvoltage condition)
VII CANL shorted to CANH
V(CANL) > 7.2V after 32us
V(CANH) - V(CANL) < -3.25V after
1.3ms
Errors caused by misbehavior of transceiver stage
VIII CANH short circuit to VDD (permanently dominant)
V(CANH) > 1.8V & V(CANH) -
V(CANL) < -3.25V after 2.5ms
IX CANL short circuit to VDD (permanently recessive)
Edgecount difference > 3
Errors caused by defective protocol unit
X CANH, CANL driven dominant for more than 1.3ms
Not all of the 10 different errors lead to a breakdown of the whole communication.
So the errors can be categorized into 'negligible', 'problematic' and 'severe':
11/35

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