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L74VHC1G125 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 L74VHC1G125
기능 Noninverting 3-State Buffer
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L74VHC1G125 데이터시트, 핀배열, 회로
LESHAN RADIO COMPANY, LTD.
Noninverting 3−State Buffer
L74VHC1G125
The L74VHC1G125 is an advanced high speed CMOS noninverting 3 state buffer fabricated with silicon gate
noninverting 3 state buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to
equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffered 3-state output which provides high noise immunity
and stable output.
The L74VHC1G125 input structure provides protection when voltages up to 7.0V are applied,regardless of
the supply voltage. This allows the L74VHC1G125 to be used to interface 5.0V circuits to 3.0V circuits.
Features
High Speed: tPD = 3.5 ns (Typ) at VCC = 5.0 V
Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Pin and Function Compatible with Other Standard Logic Families
Chip Complexity: FETs = 58; Equivalent Gates = 15
Pb−Free Packages are Available
5
4
1
2
3
SC–88A/SOT–353/SC–70
DF SUFFIX
MARKING
DIAGRAMS
5
W0 M G
G
1
5
4
1
2
3
TSOP–5/SOT–23/SC–59
DT SUFFIX
5
W0 AYW G
G
1
OE 1
IN A 2
5 VCC
GND 3
4 OUT Y
Figure 1. Pinout (Top View)
OE EN
IN A
OUT Y
Figure 2. Logic Symbol
PIN ASSIGNMENT
1 OE
2 IN A
3 GND
4 OUT Y
5 VCC
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A Input
L
H
X
FUNCTION TABLE
OE Input
Y Output
LL
LH
HZ
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
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L74VHC1G125 pdf, 반도체, 판매, 대치품
LESHAN RADIO COMPANY, LTD.
L74VHC1G125
SWITCHING WAVEFORMS
A
tPLH
50%
50% VCC
Y
VCC
GND
tPHL
Figure 4. Switching Wave Forms
OE 50%
VCC
GND
tPZL tPLZ
HIGH
Y 50% VCC
IMPEDANCE
tPZH tPHZ
VOL + 0.3V
VOH − 0.3V
Y 50% VCC
HIGH
Figure 5.
IMPEDANCE
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
DEVICE
UNDER
TEST
TEST POINT
OUTPUT 1 kW
CL *
CONNECT TO VCC WHEN
TESTING tPLZ AND tPZL.
CONNECT TO GND WHEN
TESTING tPHZ AND tPZH.
*Includes all probe and jig capacitance
Figure 6. Test Circuit
*Includes all probe and jig capacitance
Figure 7. Test Circuit
INPUT
Figure 8. Input Equivalent Circuit
DEVICE ORDERING INFORMATION
Device
Order Number
Device Nomenclature
Temp
Circuit
Indicator
Range
Identifier
Technology
Device
Function
Package
Suffix
L74VHC1G125DFT1 L
74
VHC1G 125 DF
Tape &
Reel
Suffix
T1
L74VHC1G125DFT2 L
74
VHC1G 125 DF T2
L74VHC1G125DFT4 L
74
VHC1G 125 DF T4
L74VHC1G125DTT1 L
74
VHC1G 125 DT T1
L74VHC1G125DTT3 L
74
VHC1G 125 DT T3
Package Type
(Name/SOT#/
Common Name)
SC–70/SC–88A/
SOT–353
SC–70/SC–88A/
SOT–353
SC–70/SC–88A/
SOT–353
SOT–23/TSOPS/
SC–59
SOT–23/TSOPS/
SC–59
Tape and
Reel Size
178 mm (7 in)
3000 Unit
178 mm (7 in)
3000 Unit
330 mm (13 in)
10,000 Unit
178 mm (7 in)
3000 Unit
330 mm (13 in)
10,000 Unit
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L74VHC1G125

Noninverting 3-State Buffer

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