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L74VHC1GT04 데이터시트 PDF




LRC에서 제조한 전자 부품 L74VHC1GT04은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


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부품번호 L74VHC1GT04 기능
기능 Inverting Buffer / CMOS Logic Level Shifter
제조업체 LRC
로고 LRC 로고


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L74VHC1GT04 데이터시트, 핀배열, 회로
LESHAN RADIO COMPANY, LTD.
Inverting Buffer / CMOS Logic Level Shifter
with LSTTL–Compatible Inputs
L74VHC1GT04
The L74VHC1GT04 is a single gate inverting buffer fabricated with silicon gate CMOS technology. It achieves high speed operation
similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output.
The device input is compatible with TTL–type input thresholds and the output has a full 5 V CMOS level output swing. The input
protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic–level translator from
3.0 V CMOS logic to 5.0V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high–voltage power supply.
The L74VHC1GT04 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This
allows the L74VHC1GT04 to be used to interface 5 V circuits to 3 V circuits. The output structures also provide protection when
V CC = 0 V. These input and output structures help prevent device destruction caused by supply voltage – input/output voltage mismatch,
battery backup, hot insertion, etc.
• High Speed: t PD = 3.8 ns (Typ) at V CC = 5 V
• Low Power Dissipation: I CC = 2 mA (Max) at T A = 25°C
• TTL–Compatible Inputs: V IL = 0.8 V; V IH = 2.0 V
• CMOS–Compatible Outputs: V OH > 0.8 V CC ;
V OL < 0.1 V CC @Load
• Power Down Protection Provided on Inputs and Outputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic
Families
• Chip Complexity: FETs = 105; Equivalent Gates = 26
PIN ASSIGNMENT
5
4
1
2
3
SC–70/SC–88A/SOT–353
DF SUFFIX
5
4
1
2
3
SOT–23/TSOP–5/SC–59
DT SUFFIX
MARKING DIAGRAMS
VKd
Pin 1
d = Date Code
VKd
Pin 1
d = Date Code
Figure 1. Pinout (Top View)
Figure 2. Logic Symbol
PIN ASSIGNMENT
1 NC
2 IN A
3 GND
4 OUT Y
5 V CC
www.DataSheet4U.com
FUNCTION TABLE
Inputs
A
L
H
Output
Y
H
L
ORDERING INFORMATION
See detailed ordering and shipping information in the
package dimensions section on page 5 of this data sheet.
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L74VHC1GT04 pdf, 반도체, 판매, 대치품
LESHAN RADIO COMPANY, LTD.
L74VHC1GT04
3.0V
V OH
Figure 4. Switching Waveforms
V
OL
*Includes all probe and jig capacitance
Figure 5. Test Circuit
DEVICE ORDERING INFORMATION
Device
Order Number
Device Nomenclature
Temp
Circuit
Indicator
Range
Device
Technology
Identifier
Function
Package
Suffix
L74VHC1GT04DFT1 L 74
VHC1G
T04
DF
L74VHC1GT04DFT2
L
74
VHC1G
T04
DF
L74VHC1GT04DFT4
L
74
VHC1G
T04
DF
L74VHC1GT04DTT1
L
74
VHC1G
T04
DT
L74VHC1GT04DTT3
L
74
VHC1G
T04
DT
Tape &
Reel
Suffix
T1
T2
T4
T1
T3
Package Type
(Name/SOT#/
Common Name)
Tape and
Reel Size
SC–70/SC–88A/
SOT–353
SC–70/SC–88A/
SOT–353
SC–70/SC–88A/
SOT–353
SOT–23/TSOPS/
SC–59
SOT–23/TSOPS/
SC–59
178 mm (7 in)
3000 Unit
178 mm (7 in)
3000 Unit
330 mm (13 in)
10,000 Unit
178 mm (7 in)
3000 Unit
330 mm (13 in)
10,000 Unit
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