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L74VHC1GT09 데이터시트 PDF




LRC에서 제조한 전자 부품 L74VHC1GT09은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 L74VHC1GT09 기능
기능 2-Input AND Gate with Open Drain Output
제조업체 LRC
로고 LRC 로고


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L74VHC1GT09 데이터시트, 핀배열, 회로
LESHAN RADIO COMPANY, LTD.
2-Input AND Gate with Open Drain Output
with LSTTL–Compatible Inputs
L74VHC1GT09
The L74VHC1GT09 is an advanced high speed CMOS 2–input AND gate with open drain output fabricated with silicon gate CMOS
technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including an open drain output which provides the ability to set output switching level.
This allows the L74VHC1GT09 to be used to interface 5 V circuits to circuits of any voltage between V CC and 7 V using an external
resistor and power supply.
The device input is compatible with TTL–type input thresholds and the output has a full 5.0 V CMOS level output swing. The input
protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic–level translator from
3.0 V CMOS logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high–voltage power
supply.
The L74VHC1GT09 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This
allows the L74VHC1GT09 to be used to interface 5 V circuits to 3 V circuits. The output structures also provide protection when
V CC = 0 V. These input and output structures help prevent device destruction caused by supply voltage – input/output voltage mismatch,
battery backup, hot insertion, etc.
• High Speed: t PD = 4.3 ns (Typ) at V CC = 5 V
• Low Internal Power Dissipation: I CC = 2 mA (Max) at T A = 25°C
• Power Down Protection Provided on Inputs
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: FETs = 62; Equivalent Gates = 16
MARKING DIAGRAMS
5
4
1
2
3
SC–88A/SOT–353/SC–70
DF SUFFIX
5
4
VXd
Pin 1
d = Date Code
Figure 1. Pinout (Top View)
1
2
3
TSOP–5/SOT–23/SC–59
DT SUFFIX
PIN ASSIGNMENT
1 IN B
2 IN A
3 GND
4 OUT Y
5 V CC
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VXd
Figure 2. Logic Symbol
Pin 1
d = Date Code
FUNCTION TABLE
Inputs
AB
LL
LH
HL
HH
Output
Y
L
L
L
Z
ORDERING INFORMATION
See detailed ordering and shipping information in the
package dimensions section on page 5 of this data sheet.
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L74VHC1GT09 pdf, 반도체, 판매, 대치품
LESHAN RADIO COMPANY, LTD.
L74VHC1GT09
Figure 4. Output Voltage Mismatch Application
Y
Figure 5. Switching Waveforms
Figure 6. Test Circuit
C L = 50 pF equivalent (Includes jig and probe capacitance)
R L = R 1 = 500 or equivalent
R T = Z OUT of pulse generator (typically 50 )
Figure 7. Complex Boolean Functions
Figure 8. LED Driver
Figure 9. GTL Driver
DEVICE ORDERING INFORMATION
Device Nomenclature
Device Order
Number
Logic Temp
Circuit Range Technology
Indicator Identifier
L74VHC1GT09DFT1 L
74
VHC1G
L74VHC1GT09DFT2 L
74
VHC1G
L74VHC1GT09DFT4 L
74
VHC1G
L74VHC1GT09DTT1 L
74
VHC1G
L74VHC1GT09DTT3 L
74
VHC1G
Device
Function
T09
T09
T09
T09
T09
Package Type
Package Tape and
(Name/SOT#/
Suffix Reel Suffix
Common Name)
Tape and
Reel Size
DF
T1
SC–70/SC–88A/
178 mm (7 in)
SOT–353
3000 Unit
DF T2 SC–70/SC–88A/ 178 mm (7 in)
SOT–353
3000 Unit
DF T4 SC–70/SC–88A/ 330 mm (13 in)
SOT–353
10,000 Unit
DT T1 SOT–23/TSOPS/ 178 mm (7 in)
SC–59
3000 Unit
DT T3 SOT–23/TSOPS/ 330 mm (13 in)
SC–59
10,000 Unit
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