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YSS944 데이터시트 PDF




YAMAHA에서 제조한 전자 부품 YSS944은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 YSS944 기능
기능 (YSS940 - YSS944) ADAMB Advanced Digital Audio Multi channel decode processor
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YSS944 데이터시트, 핀배열, 회로
YSS944/943/940
ADAMB
Advanced Digital Audio Multi channel decode processor
„ Outline
The YSS944 (ADAMB-f)/YSS943 (ADAMB-b)/YSS940 (ADAMB-nd) is an audio decoding digital signal
processor that integrates onto a single chip the various digital signal processing functions required for AV
amplifiers, etc. It includes an advanced 32-bit floating-point DSP and is able to decode a variety of audio
formats.
[Note]
The contents described in this manual are implemented by downloading boot firmware.
For detailed information about the boot firmware, please contact YAMAHA.
The YSS943 cannot execute DTS-ES and DTS Neo:6 decoding.
The YSS940 cannot execute any decoding related to DTS (DTS, DTS-ES, DTS 96/24, and DTS Neo:6).
„ Features
Supports various types of decoding up to 7.1 channels (5.1/6.1/7.1 channels selectable).
5.1-channel decoding of Dolby Digital (AC-3), DTS, AAC.
6.1-channel decoding of Dolby Digital EX, DTS-ES.
DTS 96/24 decoding and audio interface clock division/switching functions.
Dolby Pro Logic IIx and DTS Neo:6 decoding
Tone control and bass management functions
Function modification/expansion by downloading firmware to on-chip memory
Lip-sync function that enables synchronization of voice and video with variable voice delay
Supports sampling frequencies up to 192 kHz during PCM playback.
1/2 down sampling function when two PCM channels are played back
Dolby Digital/DTS/AAC decode information output function (can be read by microprocessor)
High-speed/high-accuracy operation by 32-bit floating-point DSP
Operating frequency: 180 MHz (178.176 MHz)
Data bus width: 32 bits (24-bit mantissa and 8-bit exponent)
Multiplier/adder: 32 bits × 32 bits + 55 bits 55 bits (47-bit mantissa and 8-bit exponent)
No external memory needed (external memory is used when delay is increased.)
Eight general I/O ports
On-chip PLL for generation of high-speed internal operating clock
Supply voltage: 1.2 V (core block) and 3.3 V (pin block)
Low power consumption: about 210 mW (standard value during Dolby Digital decoding)
Si-gate CMOS process
Lead-free plating LQFP144 package (YSS944-VZ, YSS943-VZ, and YSS940-VZ)
[Note]
“Dolby,” ”Dolby Pro Logic IIx,” and “AC-3” are trademarks of Dolby Laboratories.
“DTS,” “DTS-ES,” “DTS 96/24,” and “DTS Neo:6” are trademarks of Digital Theater Systems, Inc.
„ Applications
AV amplifiers for home theaters
Car audio systems
www.DataSheet4U.com
YSS944/943/940 CATALOG
CATALOG No.: LSI-4SS944A31
2005.6




YSS944 pdf, 반도체, 판매, 대치품
„ Pin Configuration
YSS944/943/940
nMEMCE
MEMA10
nMEMOE
MEMA18
STATUS0
STATUS1
STATUS2
STATUS3
VSS
VSS
VDD2
VDD2
VDD1
MISO
VSS
MISI
MISCK
nMICS
VDD2
VDD2
VSS
VSS
nIC
TEST
ZEROFLG
nINT
nMUTE
VDD1
VDD2
VDD2
VSS
VSS
AVSSR
AVDDR
AHVDD
AHVDDG
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
72 MEMA15
71 VDD2
70 VDD2
69 VSS
68 nMEMWE
67 MEMA11
66 MEMA9
65 MEMA8
64 VDD2
63 VDD2
62 VSS
61 VSS
60 VDD1
59 MEMA13
58 MEMA17
57 IOPORT7
56 IOPORT6
55 IOPORT5
54 IOPORT4
53 IOPORT3
52 IOPORT2
51 VDD2
50 VDD2
49 VSS
48 VSS
47 IOPORT1
46 IOPORT0
45 VDD1
44 SDO3
43 SDO2
42 VSS
41 VSS
40 SDO1
39 SDO0
38 SDOMCK
37 SDOWCK
< LQFP 144 TOP VIEW >
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YSS944 전자부품, 판매, 대치품
YSS944/943/940
Type
Pin Pin Name I/O
Function
No. Note 1)
It inputs a 64 fs bit clock.
30 SDIWCK
I This is the word clock pin for the audio interface’s input side.
26 SDI3
I This is the audio interface’s serial data input pin 3.
If this pin is not used, connect it to a ground.
27 SDI2
I This is the audio interface’s serial data input pin 2.
If this pin is not used, connect it to a ground.
28 SDI1
I This is the audio interface’s serial data input pin 1.
If this pin is not used, connect it to a ground.
29 SDI0
I This is the audio interface’s serial data input pin 0.
Connect digital audio data (various streams or PCM) via IEC60958 to
this pin.
Audio interface
38 SDOMCK Ot This is the master clock output pin for the audio interface’s output
side.
It outputs the master clock to DIT, DAC, etc.
The highest clock frequency that can be output is 25 MHz.
34 SDOBCK Is/O This is the bit clock I/O pin for the audio interface’s output side.
It inputs or outputs a 64 fs bit clock.
37 SDOWCK I/O This is the word clock pin for the audio interface’s output side.
44 SDO3
O This is the audio interface’s serial data output pin 3.
43 SDO2
O This is the audio interface’s serial data output pin 2.
40 SDO1
O This is the audio interface’s serial data output pin 1.
39 SDO0
O This is the audio interface’s serial data output pin 0.
External memory 112 MEMA18 O These are external memory address output pins 18 to 0.
interface
58 MEMA17
If external memory is not used, these pins should be left unconnected.
73 MEMA16
72 MEMA15
74 MEMA14
59 MEMA13
75 MEMA12
67 MEMA11
110 MEMA10
66 MEMA9
65 MEMA8
76 MEMA7
81 MEMA6
82 MEMA5
83 MEMA4
84 MEMA3
90 MEMA2
91 MEMA1
92 MEMA0
104 MEMD7 I/O These are external memory data I/O pins 7 to 0.
103 MEMD6
If external memory is not used, these pins should be left unconnected.
102 MEMD5
101 MEMD4
99 MEMD3
98 MEMD2
97 MEMD1
96 MEMD0
109 nMEMCE O This is the external memory chip select output pin.
If external memory is not used, this pin should be left unconnected.
111 nMEMOE O This is the external memory output enable output pin.
If external memory is not used, this pin should be left unconnected.
68 nMEMWE O This is the external memory write enable output pin.
If external memory is not used, this pin should be left unconnected.
Status ports
134 nINT
O This is the interrupt request output pin.
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(YSS940 - YSS944) ADAMB Advanced Digital Audio Multi channel decode processor

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(YSS940 - YSS944) ADAMB Advanced Digital Audio Multi channel decode processor

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