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PDF L4C383 Data sheet ( Hoja de datos )
| Número de pieza | L4C383 | |
| Descripción | 16-bit Cascadable ALU (Extended Set) | |
| Fabricantes | LOGIC Devices Incorporated | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de L4C383 (archivo pdf) en la parte inferior de esta página. Total 11 Páginas | ||
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DEVICES INCORPORATED
DEVICES INCORPORATED
L4C383
L4C38316-bit Cascadable ALU (Extended Set)
16-bit Cascadable ALU (Extended Set)
FEATURES
u High-Speed (15ns), Low Power
16-bit Cascadable ALU
u Extended Function Set
(32 Advanced ALU Functions)
u All Registers Have a Bypass Path
for Complete Flexibility
u Replaces IDT7383
u 68-pin PLCC, J-Lead
L4C383 BLOCK DIAGRAM
A15-A0
16
ENA
A REGISTER
FFFFH
DESCRIPTION
The L4C383 is a flexible, high speed,
cascadable 16-bit Arithmetic and Logic
Unit. The L4C383 is capable of
performing up to 32 different
arithmetic or logic functions.
The L4C383 can be cascaded to perform
32-bit or greater operations. See
“Cascading the L4C383” on the next
page.
bit result (F). Five select lines control
the ALU and provide 19 arithmetic and
13 logical functions. Registers are
provided on both the ALU inputs and
the output, but these may be bypassed
under user control. An internal feed-
back path allows the registered ALU
output to be routed to one or both of
the ALU inputs, accommodating chain
operations and accumulation.
ARCHITECTURE
The L4C383 operates on two 16-bit
operands (A and B) and produces a 16-
ALU OPERATIONS
The S4–S0 lines specify the operation to
be performed. The ALU functions and
their select codes are shown in Table 1.
B15-B0
16
B REGISTER
FFFFH
ALU STATUS
The ALU provides Overflow and Zero
status bits. A Carry output is also
provided for cascading multiple
ENB devices, however it is only defined for
the 19 arithmetic functions. The ALU
sets the Zero output when all 16 output
bits are zero. The N, C16 and OVF flags
FTAB for the arithmetic operations are
defined in Table 2.
N, C16
OVF, Z
4
ALU
16
RESULT REGISTER
FTF
OE
CLK
16
TO ALL REGISTERS
16
F15-F0
5
S4-0
C0
ENF
OPERAND REGISTERS
The L4C383 has two 16-bit wide input
registers for operands A and B. These
registers are rising edge triggered by a
common clock. The A register is
enabled for input by setting the ENA
control LOW, and the B register is
enabled for input by setting the ENB
control LOW. When either the ENA
control or ENB control is HIGH, the
data in the corresponding input register
will not change.
This architecture allows the L4C383 to
accept arguments from a single 16-bit
data bus. For those applications that do
not require registered inputs, both the
A and B operand registers can be
bypassed with the FTAB control line.
Arithmetic Logic Units
1 08/16/2000–LDS.383-E
1 page  
DEVICES INCORPORATED
L4C383
16-bit Cascadable ALU (Extended Set)
MAXIMUM RATINGS Above which useful life may be impaired (Notes 1, 2, 3, 8)
Storage temperature ........................................................................................................... –65°C to +150°C
Operating ambient temperature ........................................................................................... –55°C to +125°C
VCC supply voltage with respect to ground ............................................................................ –0.5 V to +7.0 V
Input signal with respect to ground ........................................................................................ –3.0 V to +7.0 V
Signal applied to high impedance output ............................................................................... –3.0 V to +7.0 V
Output current into low outputs ............................................................................................................. 25 mA
Latchup current ............................................................................................................................... > 400 mA
OPERATING CONDITIONS To meet specified electrical and switching characteristics
Mode
Active Operation, Commercial
Active Operation, Military
Temperature Range (Ambient)
0°C to +70°C
–55°C to +125°C
Supply Voltage
4.75 V ≤ VCC ≤ 5.25 V
4.50 V ≤ VCC ≤ 5.50 V
ELECTRICAL CHARACTERISTICS Over Operating Conditions (Note 4)
Symbol Parameter
Test Condition
VOH Output High Voltage
VCC = Min., IOH = –2.0 mA
VOL Output Low Voltage
VCC = Min., IOL = 8.0 mA
VIH Input High Voltage
VIL Input Low Voltage
(Note 3)
IIX Input Current
Ground ≤ VIN ≤ VCC (Note 12)
IOZ Output Leakage Current Ground ≤ VOUT ≤ VCC (Note 12)
ICC1 VCC Current, Dynamic
(Notes 5, 6)
ICC2 VCC Current, Quiescent (Note 7)
Min Typ Max Unit
2.4 V
0.5 V
2.0 VCC V
0.0 0.8 V
±20 µA
±20 µA
15 30 mA
1.5 mA
Arithmetic Logic Units
5 08/16/2000–LDS.383-E
5 Page 
DEVICES INCORPORATED
L4C383
16-bit Cascadable ALU (Extended Set)
ORDERING INFORMATION
68-pin
A9
A10
A11
A12
A13
A14
A15
CLK
VCC
GND
C16
GND
N
ZERO
OVF
ENF
FTF
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
10 60
11 59
12 58
13 57
14 56
15 55
16 54
17
Top
53
18 52
19
View
51
20 50
21 49
22 48
23 47
24 46
25 45
26 44
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
B7
B6
B5
B4
B3
B2
B1
B0
ENA
ENB
FTAB
S4
S3
S2
S1
S0
C0
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Plastic J-Lead Chip Carrier
Speed
(J2)
Ceramic Pin Grid Array
(G1)
0°C to +70°C — COMMERCIAL SCREENING
26 ns
L4C383JC26
20 ns
L4C383JC20
–55°C to +125°C — COMMERCIAL SCREENING
–55°C to +125°C — MIL-STD-883 COMPLIANT
Arithmetic Logic Units
11 08/16/2000–LDS.383-E
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet L4C383.PDF ] | |
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