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ADM1276 데이터시트 PDF




Analog Devices에서 제조한 전자 부품 ADM1276은 전자 산업 및 응용 분야에서
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부품번호 ADM1276 기능
기능 Hot Swap Controller and Digital Power and Energy Monitoring
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ADM1276 데이터시트, 핀배열, 회로
Data Sheet
Hot Swap Controller and Digital Power and
Energy Monitoring with PMBus Interface
ADM1276
FEATURES
Controls supply voltages from 2 V to 20 V
370 ns response time to short circuit
Resistor-programmable 5 mV to 25 mV current limit
±1% accurate, 12-bit ADC for current, VIN/VOUT readback
Charge pumped gate drive for multiple external N-channel FETs
High gate drive voltage to ensure lowest RDSON
Foldback for tighter FET SOA protection
Automatic retry or latch-off on current fault
Programmable current-limit timer for SOA
Programmable, multifunction GPO
Power-good status output
Analog UV and OV protection
ENABLE pin
Reports power and energy consumption over time
Peak detect registers for current and voltage
PMBus fast mode compliant interface
20-lead LFCSP
APPLICATIONS
Power monitoring and control/power budgeting
Central office equipment
Telecommunication and data communication equipment
PCs/servers
GENERAL DESCRIPTION
The ADM1276 is a hot swap controller that allows a circuit board
to be removed from or inserted into a live backplane. It also features
current and voltage readback via an integrated 12-bit analog-to-
digital converter (ADC), accessed using a PMBus™ interface.
The load current is measured using an internal current sense
amplifier that measures the voltage across a sense resistor in
the power path via the SENSE+ and SENSE− pins. A default
limit of 20 mV is set, but this limit can be adjusted, if required,
using a resistor divider network from the internal reference
voltage to the ISET pin.
The ADM1276 limits the current through the sense resistor by
controlling the gate voltage of an external N-channel FET in the
power path, via the GATE pin. The sense voltage—and, therefore,
the load current—is maintained below the preset maximum. The
ADM1276 protects the external FET by limiting the time that the
FET remains on while the current is at its maximum value. This
current-limit time is set by the choice of capacitor connected to
the TIMER pin. In addition, a foldback resistor network can be
used to actively lower the current limit as the voltage across the
FET is increased. This helps to maintain constant power in the
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
FUNCTIONAL BLOCK DIAGRAM
SENSE+
SENSE–
VCC
VCAP
ENABLE
UV
OV
ISET
SS
+×50–
ADM1276-3
LDO
+
1.0V
1.0V +
REF
SELECT
IOUT
+
CHARGE
PUMP
VCP
GATE
DRIVE/
LOGIC
TIMEOUT
CURRENT
LIMIT
1.0V
CURRENT
LIMIT
CONTROL
TIMER ON
GATE
VOUT
FLB
TIMER
TIMER
TIMEOUT
SENSE+
VOUT
IOUT
12-BIT
ADC
LOGIC
AND
PMBus
PWRGD
GPO2/ALERT2
LATCH
SCL
SDA
ADR
GND
Figure 1.
FET and allows the safe operating area (SOA) to be adhered to
in an effective manner.
In case of a short-circuit event, a fast internal overcurrent
detector responds within 370 ns and signals the gate to shut
down. A 1500 mA pull-down device ensures a fast FET response.
The ADM1276 features overvoltage (OV) and undervoltage (UV)
protection, programmed using external resistor dividers on the
UV and OV pins. A PWRGD signal can be used to detect when
the output supply is valid, using the FLB pin to monitor the output.
A GPO pin can be configured as an output signal that can be
asserted when a programmed current or voltage level is reached.
The 12-bit ADC can measure the current in the sense resistor,
as well as the supply voltage on the SENSE+ pin or the output
voltage. A PMBus interface allows a controller to read current
and voltage data from the ADC. Measurements can be initiated
by a PMBus command. Alternatively, the ADC can run conti-
nuously, and the user can read the latest conversion data whenever
required. As many as four unique PMBus addresses can be selected,
depending on the way that the ADR pin is connected.
The ADM1276 is available in a 20-lead LFCSP with a LATCH pin
that can be configured for automatic retry or latch-off when an
overcurrent fault occurs.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2011–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com




ADM1276 pdf, 반도체, 판매, 대치품
Data Sheet
PMON_CONFIG ........................................................................42
ALERT2_CONFIG .....................................................................43
DEVICE_CONFIG .....................................................................44
POWER_CYCLE.........................................................................44
PEAK_PIN ...................................................................................44
REVISION HISTORY
11/13—Rev. B to Rev. C
Changes to GATE Pin Parameter, Table 1......................................4
4/13—Rev. A to Rev. B
Added Partial Transactions on I2C Bus Section ..........................24
Changes to Ordering Guide...........................................................45
7/11—Rev. 0 to Rev. A
Changes to Features Section ............................................................1
Changes to General Description Section ......................................1
Added Endnote 1 to Table 2.............................................................8
Changes to Figure 3.........................................................................10
Changes to Table 5 ..........................................................................10
Changes to Power Monitor Section ..............................................24
Changes to PMBus Direct Format Conversion Section.............31
3/11—Revision 0: Initial Version
ADM1276
READ_PIN_EXT ........................................................................44
READ_EIN_EXT ........................................................................44
Outline Dimensions........................................................................45
Ordering Guide ...........................................................................45
Rev. C | Page 3 of 48

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ADM1276 전자부품, 판매, 대치품
ADM1276
Data Sheet
Parameter
GPO2/ALERT2 PIN
Output Low Voltage
Symbol
VOL_GPO2
Leakage Current
PWRGD PIN
Output Low Voltage
VOL_PWRGD
VCC That Guarantees Valid
Output
Leakage Current
CURRENT AND VOLTAGE
MONITORING
Current Sense Absolute
Error
SENSE+/VOUT Absolute
Error
ADC Conversion Time
Power Multiplication Time
ADR PIN
Address Set to 00
Input Current for Address 00
Address Set to 01
Address Set to 10
Min Typ Max Unit Test Conditions/Comments
0.4 V
IGPO2 = 1 mA
1.5 V
IGPO2 = 5 mA
100 nA VGPO2 ≤ 2 V; GPO output high-Z
1 µA VGPO2 = 20 V; GPO output high-Z
0.4 V
IPWRGD = 1 mA
1.5 V
IPWRGD = 5 mA
1 V ISINK = 100 μA; VOL_PWRGD = 0.4 V
100 nA VPWRGD ≤ 2 V; PWRGD output high-Z
1 µA VPWRGD = 20 V; PWRGD output high-Z
±0.2
±0.08
±0.08
±0.2
±0.08
±0.2
±0.09
±0.2
±0.04
±0.15
±0.7
±1.0
±1.0
±2.8
±0.7
±0.75
±0.8
±1.1
±2.0
±4.3
±1.0
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
±1.0 %
237 280 µs
360 426 µs
3753 4233 µs
5545 6570 µs
14 µs
25 mV input range; 128 sample averaging (unless otherwise
noted)
VSENSE = 20 mV; VSENSE+ = 12 V; TA = 0°C to 65°C
VSENSE = 20 mV; VSENSE+ = 12 V; TA = 25°C
VSENSE = 20 mV
VSENSE = 20 mV; TA = 25°C
VSENSE = 20 mV; TA = 0°C to 65°C
VSENSE = 20 mV; 16 sample averaging
VSENSE = 20 mV; 16 sample averaging; TA = 25°C
VSENSE = 20 mV; 16 sample averaging; TA = 0°C to 65°C
VSENSE = 20 mV; 1 sample averaging
VSENSE = 20 mV; 1 sample averaging; TA = 25°C
VSENSE = 20 mV; 1 sample averaging; TA = 0°C to 65°C
VSENSE = 25 mV; VSENSE+ = 12 V
VSENSE = 25 mV; VSENSE+ = 12 V; TA = 25°C
VSENSE = 25 mV; VSENSE+ = 12 V; TA = 0°C to 65°C
VSENSE = 20 mV; VSENSE+ = 12 V
VSENSE = 15 mV; VSENSE+ = 12 V
VSENSE = 10 mV; VSENSE+ = 12 V
VSENSE = 5 mV; VSENSE+ = 12 V
VSENSE = 2.5 mV; VSENSE+ = 12 V
Low input range; input voltage ≥ 3 V
High input range; input voltage ≥ 10 V
Includes time for power multiplication
1 sample of VIN and IOUT; from command received to valid
data in register
1 sample of VIN, VOUT, and IOUT; from command received to
valid data in register
16 samples of VIN and IOUT averaged; from command
received to valid data in register
16 samples of VIN, VOUT, and IOUT averaged; from command
received to valid data in register
0
0.8 V
Connect to GND
−40 −22
μA VADR = 0 V to 0.8 V
135 150 165 kΩ Resistor to GND
−1 +1 μA No connect state; maximum leakage current allowed
Rev. C | Page 6 of 48

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