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ADP2126 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 ADP2126
기능 (ADP2126 / ADP2127) DC-to-DC Converters
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ADP2126 데이터시트, 핀배열, 회로
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Ultralow Profile, 500 mA, 6 MHz, Synchronous,
Step-Down, DC-to-DC Converters
ADP2126/ADP2127
FEATURES
1.20 V and 1.26 V fixed output voltage options
Clock signal enable
Logic signal enable also available on certain models
6 MHz operating frequency
Spread spectrum frequency modulation to reduce EMI
500 mA continuous output current
Input voltage: 2.1 V to 5.5 V
0.3 μA (typical) shutdown supply current
Pin-selectable power-saving mode
Compatible with tiny multilayer inductors
Internal synchronous rectifier
Internal compensation
Internal soft start
Output-to-ground short-circuit protection
Current-limit protection
Undervoltage lockout
Thermal shutdown protection
0.330 mm height (maximum), 6-ball BUMPED_CHIP (ADP2126)
0.200 mm height (maximum), 6-pad EWLP (ADP2127)
APPLICATIONS
Mobile phones
Digital still/video cameras
Digital audio
Portable equipment
Camera modules
Image stabilization systems
GENERAL DESCRIPTION
The ADP2126/ADP2127 are high frequency, step-down, dc-to-
dc converters optimized for portable applications in which board
area and battery life are critical constraints. The fixed 6 MHz
operating frequency enables the use of tiny ceramic inductors
and capacitors and the regulators use spread spectrum frequency
modulation to reduce EMI. Additionally, synchronous rectification
improves efficiency and results in fewer external components.
At high load currents, the ADP2126/ADP2127 use a voltage
regulating pulse-width modulation (PWM) mode that maintains
a constant frequency with excellent stability and transient response.
Light load operation is determined by the state of the MODE pin.
In forced PWM mode, the converter continues operating in PWM
for light loads. Under light load conditions in auto mode, the
ADP2126/ADP2127 automatically enter a power-saving mode,
which uses pulse frequency modulation (PFM) to reduce the
effective switching frequency, thus ensuring the longest battery
life in portable applications.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
TYPICAL APPLICATION CIRCUITS
INPUT
VOLTAGE
2.1V TO 5.5V
CIN
2.2µF
ADP2126
L
1.0µH
A2 VIN
SW B1
C2 GND
FB C1
OUTPUT
VOLTAGE
1.20V OR 1.26V
COUT
2.2µF
EXTCLK MODE
B2 A1
PWM
AUTO
OFF ON
OR
ON *
OFF
*LOGIC HIGH ENABLE IS ONLY AVAILABLE ON CERTAIN MODELS.
Figure 1. ADP2126 0.33 mm Maximum Height Solution
INPUT
VOLTAGE
2.1V TO 5.5V
CIN
2 × 1µF
ADP2127
L
0.56µH
A2 VIN
SW B1
C2 GND
FB C1
EXTCLK MODE
B2 A1
PWM
AUTO
OUTPUT
VOLTAGE
1.20V OR 1.26V
COUT
2 × 1µF
OFF ON
OR
ON *
OFF
*LOGIC HIGH ENABLE IS ONLY AVAILABLE ON CERTAIN MODELS.
Figure 2. ADP2127 0.22 mm Maximum Height Solution
The ADP2126/ADP2127 are enabled by a 6 MHz to 27 MHz
external clock signal applied to the EXTCLK pin. Certain models
can also be enabled with a logic high signal. When the external clock
is not switching and in a low logic state, the ADP2126/ADP2127
stop regulating and shut down to draw less than 0.3 μA (typical)
from the source.
The ADP2126/ADP2127 have an input voltage range of 2.1 V to
5.5 V, allowing the use of single Li+/Li polymer cell, three-cell
alkaline, NiMH cell, and other standard power sources. The
ADP2126/ADP2127 are internally compensated to minimize
external components and can source up to 500 mA. Other key
features, such as cycle-by-cycle peak current limit, soft start,
undervoltage lockout (UVLO), output-to-ground short-circuit
protection, and thermal shutdown provide protection for internal
and external circuit components.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.




ADP2126 pdf, 반도체, 판매, 대치품
ADP2126/ADP2127
Parameter
TIMING
VIN High to EXTCLK On2
EXTCLK On to VOUT Rising
EXTCLK On to VOUT Rising
VOUT Power-Up Time (Soft Start)2
EXTCLK Off to VOUT Falling
EXTCLK Off to VOUT Falling
VOUT Power-Down Time
Minimum Shutdown Time2
Minimum Power-Off Time2
Symbol
t1
t2 (CLOCK)
t2 (LOGIC)
t3
t5 (CLOCK)
t5 (LOGIC)
t6
t5 + t6
t7
Test Conditions/Comments
See Figure 3 and Figure 4
VIN = 2.1 V to 5.5 V
DEXTCLK = 40% to 60%, fEXTCLK = 6 MHz
DEXTCLK = 40% to 60%, fEXTCLK = 27 MHz
EXTCLK = logic high
COUT = 2.2 μF, RLOAD = 3.6 Ω
DEXTCLK = 40% to 60%, fEXTCLK = 6 MHz to 27 MHz
EXTCLK = logic high, no load
COUT = 2.2 μF, RLOAD = 3.6 Ω
COUT = 2.2 μF, no load
COUT = 2.2 μF, no load
Min
200
250
250
285
1400
500
1 The total shutdown current is the addition of VIN shutdown current and SW leakage.
2 Guaranteed by design.
3 Transients not included in voltage accuracy specifications.
4 The PFM output voltage will be higher than the PWM output voltage. See the Typical Performance Characteristics section.
5 Thermal shutdown protection is only active in PWM mode.
Typ Max
320 400
320 400
315 385
70 200
9 17
0
16
465
Unit
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
TIMING DIAGRAMS
VIN
VOUT
EXTCLK
VIN × 90%
t3
t2
t1
t6
t5
Figure 3. Clock Enable I/O Timing Diagram
t7
VOUT(NOM) × 10%
VIN × 10%
VIN
VOUT
EXTCLK
VIN × 90%
t3
t2
t6
t5
t7
VOUT(NOM) × 10%
t1
Figure 4. Logic Enable I/O Timing Diagram (Logic High Enable Feature Only Available on Certain Models)
VIN × 10%
Rev. A | Page 4 of 20

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ADP2126 전자부품, 판매, 대치품
ADP2126/ADP2127
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 3.6 V, fEXTCLK = 10 MHz, VOUT = 1.20 V, L = 1.0 μH (CKP1608S1R0), CIN = 2.2 μF (GRM153R60J225ME95), COUT = 2.2 μF
(GRM153R60G225M), and TA = 25°C, unless otherwise noted.
90
AUTO MODE
80
1.205
70
60 1.204
50
40
PWM MODE
30
20
VIN = 2.1V
VIN = 2.5V
10
VIN = 3.6V
VIN = 4.2V
0 VIN = 5.5V
1 10 100 1000
LOAD CURRENT (mA)
Figure 6. Efficiency vs. Load Current
1.203
1.202
1
VIN = 2.1V
VIN = 2.5V
VIN = 3.6V
VIN = 4.2V
VIN = 5.5V
10 100
LOAD CURRENT (mA)
Figure 9. PWM Mode Output Voltage Accuracy
1000
90 250
80
70
60
50
40
30
2.1
ILOAD = 50mA, PWM MODE
ILOAD = 100mA, PWM MODE
ILOAD = 10mA, PFM MODE
ILOAD = 50mA, PFM MODE
ILOAD = 100mA, PFM MODE
ILOAD = 250mA, PFM MODE
2.6 3.1 3.6 4.1
INPUT VOLTAGE (V)
4.6
Figure 7. Efficiency vs. Input Voltage
5.1
200
PWM OPERATION
150
100
PFM OPERATION
50
0
2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
INPUT VOLTAGE (V)
Figure 10. Auto Mode Switching Threshold vs. Input Voltage
1.24
1.23
1.22
VIN = 2.1V
VIN = 2.5V
VIN = 3.6V
VIN = 4.2V
VIN = 5.5V
1.21
1.20
1.19
1
10 100
LOAD CURRENT (mA)
Figure 8. Auto Mode Output Voltage Accuracy
1000
60
VIN = 2.1V
VIN = 3.6V
50 VIN = 5.5V
40
30
20
10
0
0 100 200 300 400
LOAD CURRENT (mA)
Figure 11. Output Voltage Ripple vs. Load Current
500
Rev. A | Page 7 of 20

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