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PDF KK74HCT373A Data sheet ( Hoja de datos )
| Número de pieza | KK74HCT373A | |
| Descripción | Octal 3-State Noninverting Transparent Latch | |
| Fabricantes | KODENSHI KOREA | |
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Octal 3-State Noninverting
Transparent Latch
TECHNICAL DATA
KK74HCT373A
The KK74HCT373A may be used as a level converter for interfacing
TTL or NMOS outputs to High-Speed CMOS inputs.
The KK74HCT373A is identical in pinout to the LS/ALS373.
The eight latches of the KK74HCT373A are transparent D-type latches.
While the Latch Enable is high the Q outputs follow the Data Inputs.
When Latch Enable is taken low, data meeting the setup and hold times
becomes latched.
The Output Enable does not affect the state of the latch, but when
Output Enable is high, all outputs are forced to the high-impedance state.
Thus, data may be latched even when the outputs are not enabled.
• TTL/NMOS-Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 µA
ORDERING INFORMATION
KK74HCT373AN Plastic
KK74HCT373ADW SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 20=VCC
PIN 10 = GND
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FUNCTION TABLE
Inputs
Output Latch
Enable Enable
LH
LH
LL
HX
X = Don’t Care
Z = High Impedance
D
H
L
X
X
Output
Q
H
L
No Change
Z
1
1 page  
KK74HCT373A
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
Figure 3. Switching Waveforms
Figure 4. Switching Waveforms
Figure 5. Test Circuit
Figure 6. Test Circuit
EXPANDED LOGIC DIAGRAM
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet KK74HCT373A.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| KK74HCT373A | Octal 3-State Noninverting Transparent Latch | KODENSHI KOREA |
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