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부품번호 | KK74HCT374A 기능 |
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기능 | Octal 3-State Noninverting D Flip-Flop | ||
제조업체 | KODENSHI KOREA | ||
로고 | |||
TECHNICAL DATA
Octal 3-State
Noninverting D Flip-Flop
High-Performance Silicon-Gate CMOS
KK74HCT374A
The KK74HCT374A is identical in pinout to the LS/ALS374.
The KK74HCT374A may be used as a level converter for interfacing
TTL or NMOS outputs to High-Speed CMOS inputs.
Data meeting the setup and hold time is clocked to the outputs with
the rising edge of the Clock. The Output Enable input does not affect the
states of the flip-flops, but when Output Enable is high, the outputs are
forced to the high-impedance state; thus, data may be stored even when
the outputs are not enabled.
• TTL/NMOS-Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 µA
ORDERING INFORMATION
KK74HCT374AN Plastic
KK74HCT374ADW SOIC
TA = -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 20=VCC
PIN 10 = GND
www.DataSheet4U.net
FUNCTION TABLE
Output
Enable
L
L
L
Inputs
Clock
L,H,
HX
X = don’t care
Z = high impedance
Output
DQ
HH
LL
X no
change
XZ
1
KK74HCT374A
AC ELECTRICAL CHARACTERISTICS (VCC =5.0 V ± 10%, CL=50pF,Input tr=tf=6.0 ns)
Symbol
Parameter
fmax
tPLH, tPHL
tPLZ, tPHZ
tPZH, tPZL
tTLH, tTHL
CIN
COUT
Maximum Clock Frequency (50% Duty Cycle)
(Figures 1 and 4)
Maximum Propagation Delay, Clock to Q
(Figures 1 and 4)
Maximum Propagation Delay, Output Enable to
Q (Figures 2 and 5)
Maximum Propagation Delay, Output Enable to
Q (Figures 2 and 5)
Maximum Output Transition Time, Any Output
(Figures 1 and 4)
Maximum Input Capacitance
Maximum Three-State Output Capacitance
(Output in High-Impedance State)
Guaranteed Limit
25 °C
to
-55°C
≤85°C
≤125°C
30 24
20
Unit
MHz
31 39
47 ns
30 38
45 ns
30 38
45 ns
12 15
18 ns
10 10
15 15
10 pF
15 pF
Power Dissipation Capacitance (Per Flip-Flop)
CPD Used to determine the no-load dynamic power
consumption:
PD=CPDVCC2f+ICCVCC
Typical @25°C,VCC=5.0 V
65
pF
TIMING REQUIREMENTS (VCC =5.0 V ± 10%, CL=50pF,Input tr=tf=6.0 ns)
Symbol
Parameter
tSU Minimum Setup Time, Data to
Clock (Figure 3)
th Minimum Hold Time, Clock
to Data (Figure 3)
tw Minimum Pulse Width, Clock
(Figure 1)
tr, tf Maximum Input Rise and Fall
Times (Figure 1)
Guaranteed Limit
25 °C to
-55°C
≤85°C
≤125°C
12 15 18
5.0 5.0 5.0
12 15 18
500 500 500
Unit
ns
ns
ns
ns
4
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구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
부품번호 | 상세설명 및 기능 | 제조사 |
KK74HCT374A | Octal 3-State Noninverting D Flip-Flop | KODENSHI KOREA |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |