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XE8802 데이터시트 PDF




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부품번호 XE8802 기능
기능 Sensing Machine Data Acquisition MCU
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XE8802 데이터시트, 핀배열, 회로
www.DataSheet4U.net
XE8802 Sensing Machine Data Acquisition MCU
with ZoomingADC™ and LCD driver
XE8802 Sensing Machine
Data Acquisition SoC with 16+10 bit ZoomingADC™
Embedded RISC controller and LCD driver
General Description
The XE8802 includes a high resolution acquisition
path with the 16+10 bits ZoomingADC™ and an
LCD driver for up to 120 segments. The LCD lines
can be used as additional I/Os.
The embedded core of the XE8802 is an ultra
low-power low-voltage microcontroller unit (MCU)
with a strict 1 instruction per clock processing and
branch speed, allowing for a sustained 4MIPS at
1200µA under 2.4 to 5.5 V.
The XE8802 is available with on chip ROM or
Multiple-Time-Programmable (MTP) program
memory.
Applications
Portable, battery operated instruments
Medical portable instrument
Remote control
HVAC control
Metering
Sports watches, wrist instruments
Key product Features
Low-power, high resolution ZoomingADC
16-bits sigma-delta type ADC
0.5 to 1000 gain with offset cancellation
up to 13 inputs multiplexer, 8 dedicated inputs
4 low power comparators
Low-voltage low-power controller operation
2 or 4 MIPS max, 2.4 to 5.5 V operation
300µA per 1MIPS over full voltage range
7MIPS or 1.2V operation in ROM
Hardware MULT
up to 22kByte (8 kInstruction) MTP
1032Byte RAM data memory
RC and crystal oscillators
5 reset, 22 interrupt, 8 event sources
36 I/O lines, hardware UART and SPI
120 segments LCD driver,
can be used as 32 extra I/O lines
100 years MTP Flash retention at 55°C
Ordering Information
Product
Temperature range
XE8802MI000
-40°C to 85 °C
XE8802MI035LF -40°C to 85 °C
Memory type
MTP
MTP
Package
die
LQFP100
Rev 1 January 2006
www.semtech.com




XE8802 pdf, 반도체, 판매, 대치품
www.DataSheet4U.net
XE8802 Sensing Machine Data Acquisition MCU
with ZoomingADC™ and LCD driver
1.1 Top schematic
The top-level block schematic of the circuit is shown in Figure 1-1. The heart of the circuit consists of the
Coolrisc816 CPU core. This core includes an 8x8 multiplier and 16 internal registers.
The bus controller generates all control signals for access to all data registers other than the CPU internal
registers.
The reset block generates the adequate reset signals for the rest of the circuit as a function of the set-up contained
in its control registers. Possible reset sources are the power-on-reset (POR), the external pin NRESET, the
watchdog (WD), a bus error detected by the bus controller or a programmable pattern on Port A. Different low
power modes are implemented.
The clock generation and power management block sets up the clock signals and generates internal supplies for
different blocks. The clock can be generated from the RC oscillator (this is the start-up condition), the crystal
oscillator (XTAL) or an external clock source (given on the XIN pin).
The test controller generates all set-up signals for different test modes. In normal operation, it is used as a set of 8
low power data registers. If power consumption is important for the application, the variables that need to be
accessed frequently should be stored in these registers rather than in the RAM.
The IRQ handler routes the interrupt signals of the different peripherals to the IRQ inputs of the CPU core. It allows
masking of the interrupt sources and it flags which interrupt source is active.
Events are generally used to restart the processor after a HALT period without jumping to a specified address, i.e.
the program execution resumes with the instruction following the HALT instruction. The EVN handler routes the
event signals of the different peripherals to the EVN inputs of the CPU core. It allows masking of the interrupt
sources and it flags which interrupt source is active.
The Port B is an 8-bit parallel IO port with analog capabilities. The URST, UART, PWM and CMPD block also
make use of this port.
The instruction memory is a 22-bit wide flash or ROM memory depending on the circuit version. In case of the
ROM version, the VPP and NFASTREAD pins are not used. ROM versions have 8k instruction memory. Flash
versions have 8k or 4k instruction memories depending on the selected operation speed.
The data memory on this product is a 1024 byte SRAM.
The Acquisition Chain is a high-resolution acquisition path with the 16+10 bits ZoomingADC. The VMULT
(voltage multiplier) powers a part of the Acquisition Chain.
The SPI is a serial interface with a master or slave configuration capability. When unused, the 4 SPI pads can be
used as 4-bit wide general-purpose I/O port.
The port A is an 8 bit parallel input port. It can also generate interrupts, events or a reset. It can be used to input
external clocks for the timer/counter/PWM block.
The Port D1 and the Port D2 are two general-purpose 8 bit parallel I/O ports.
The LCD driver can support a direct drive display (up to 32 segments), or multiplex 1/2, 1/3, 1/4 displays (up to 120
segments). The driver contains an on chip low-power voltage generation device VGEN. The LCD lines can be used
as additional I/O pins.
The USRT (universal synchronous receiver/transmitter) contains some simple hardware functions in order to
simplify the software implementation of a synchronous serial link.
© Semtech 2006
www.semtech.com
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XE8802 전자부품, 판매, 대치품
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XE8802 Sensing Machine Data Acquisition MCU
with ZoomingADC™ and LCD driver
3
PD2(5)
53 LCD_IO(1)
4
PD2(6)
54 LCD_IO(2)
5
PD2(7)
55 LCD_IO(3)
6
NRESET
56 LCD_VR1
7
TEST
57 LCD_IO(4)
8
AC_A(0)
58 LCD_IO(5)
9
AC_A(1)
59 LCD_IO(6)
10 AC_A(2) 60 LCD_IO(7)
11 AC_A(3) 61 LCD_IO(8)
12 AC_A(4) 62 LCD_IO(9)
13 AC_A(5) 63 LCD_IO(10)
14 AC_A(6) 64 LCD_IO(11)
15 AC_A(7) 65 LCD_IO(12)
16 AC_R(1) 66 LCD_IO(13)
17 AC_R(0) 67 LCD_IO(14)
18 AC_R(3) 68 LCD_IO(15)
19 AC_R(2) 69 LCD_IO(16)
20 XIN 70 LCD_IO(17)
21 VSS 71 LCD_IO(18)
22 XOUT 72 LCD_IO(19)
23 VBAT 73 LCD_IO(20)
24 VREG 74 LCD_IO(21)
25 VMULT 75 LCD_IO(22)
26 PA(2) 76 LCD_IO(23)
27 PD1(2) 77 LCD_IO(24)
28 PA(3) 78 LCD_IO(25)
29 PD1(3) 79 LCD_IO(26)
30 PA(4) 80 LCD_IO(27)
31 PD1(4) 81 LCD_IO(28)
32 PA(5) 82 LCD_IO(29)
33 PD1(5) 83 LCD_IO(30)
34 PA(6) 84 LCD_IO(31)
35 PD1(6) 85 LCD_COM(1)
36 PA(7) 86 LCD_COM(0)
37 PD1(7) 87 VGEN_VA
38 PB(0) 88 VGEN_V1
39 PB(1) 89 VGEN_V2
40 PB(2) 90 VGEN_V3
41 PB(3) 91 VGEN_VB
42 PB(4) 92
VSS
43 PB(5) 93 NFASTREAD
44 PB(6) 94 PD1(0)
45 PB(7) 95 PA(0)
46 SPI(0) 96 PD1(1)
47 SPI(1) 97 PA(1)
48 SPI(2) 98 PD2(0)
49 SPI(3) 99 PD2(1)
50
VPP
100 PD2(2)
Table 1-1. Bonding plan of the LQFP-100 package (LQFP 100L 14x14mm thick 1.6 mm)
© Semtech 2006
www.semtech.com
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XE8802

Sensing Machine Data Acquisition MCU

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