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PDF SSM4507M Data sheet ( Hoja de datos )
| Número de pieza | SSM4507M | |
| Descripción | COMPLEMENTARY N AND P-CHANNEL ENHANCEMENT MODE POWER MOSFET | |
| Fabricantes | Silicon Standard | |
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SSM4507M
COMPLEMENTARY N AND P-CHANNEL ENHANCEMENT-MODE POWER MOSFETS
Simple drive requirement
Lower gate charge
Fast switching performance
Description
D2
D2 D2
D1 D2
D1 D1
D1
SO-8
GG22
S2
G1 S2
S1 G1
S1
Advanced Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-
effectiveness.
The SO-8 package is widely preferred for commercial and
industrial surface mount applications and is well suited for
low-voltage applications such as DC/DC converters.
N-Ch
P-Ch
BV DSS
R DS(ON)
ID
BV DSS
R DS(ON)
ID
D1
G1 G2
S1
Absolute Maximum Ratings
Symbol
Parameter
VDS
VGS
ID@TA=25°C
ID@TA=70°C
IDM
PD@TA=25°C
TSTG
TJ
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current3
Continuous Drain Current3
Pulsed Drain Current1
Total Power Dissipation
Linear Derating Factor
Storage Temperature Range
Operating Junction Temperature Range
Thermal Data
Symbol
Rthj-a
Parameter
Thermal Resistance Junction-ambient3
Rating
N-channel P-channel
30 -30
±20 ±20
6 -4.2
4.8 -3.4
20 -20
2.0
0.016
-55 to 150
-55 to 150
Max.
Value
62.5
30V
36mΩ
6.0A
-30V
72mΩ
-4.2A
D2
S2
Units
V
V
A
A
A
W
W/°C
°C
°C
Unit
°C/W
Rev.1.01 4/06/2004
www.SiliconStandard.com
1 of 7
1 page  
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N-channel
12
ID=6A
10 V DS =24V
8
6
4
2
0
0 2 4 6 8 10 12
Q G , Total Gate Charge (nC)
Fig 7. Gate Charge Characteristics
SSM4507M
f=1.0MHz
1000
C iss
C100 oss
C rss
10
1 5 9 13 17 21 25 29
V DS , Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance Characteristics
100
10
1ms
10ms
1
100ms
0.1
T A =25 o C
Single Pulse
1s
10s
DC
0.01
0.1
1 10
V DS , Drain-to-Source Voltage (V)
100
Fig 9. Maximum Safe Operating Area
1
Duty factor=0.5
0.2
0.1
0.1
0.05
0.01
0.02
0.01
Single Pulse
PDM
t
T
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
Rthja=135oC/W
0.001
0.0001
0.001
0.01 0.1 1 10
t , Pulse Width (s)
100 1000
Fig 10. Effective Transient Thermal Impedance
VDS
90%
10%
VGS
td(on) tr
td(off)tf
VG
4.5V
QG
QGS
QGD
Charge
Q
Fig 11. Switching Time Waveform
Fig 12. Gate Charge Waveform
Rev.1.01 4/06/2004
www.SiliconStandard.com
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| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet SSM4507M.PDF ] | |
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