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PDF SSM4532GM Data sheet ( Hoja de datos )

Número de pieza SSM4532GM
Descripción N AND P-CHANNEL ENHANCEMENT MODE POWER MOSFET
Fabricantes Silicon Standard 
Logotipo Silicon Standard Logotipo



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SSM4532GM
N AND P-CHANNEL ENHANCEMENT
MODE POWER MOSFET
PRODUCT SUMMARY
Simple Drive Requirement
Low On-resistance
Fast Switching
DESCRIPTION
D2
D2
D1
D1
SO-8
G2
S2
G1
S1
N-CH
P-CH
BVDSS
RDS(ON)
ID
BVDSS
RDS(ON)
ID
The advanced power MOSFETs from Silicon Standard Corp.
provide the designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
30V
50mΩ
5A
-30V
70mΩ
-4A
The SO-8 package is universally preferred for all commercial-
industrial surface mount applications and suited for low voltage
applications such as DC/DC converters.
D1
Pb-free; RoHS-compliant
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS
VGS
ID@TA=25
ID@TA=70
IDM
PD@TA=25
TSTG
TJ
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current3
Continuous Drain Current3
Pulsed Drain Current1
Total Power Dissipation
Linear Derating Factor
Storage Temperature Range
Operating Junction Temperature Range
THERMAL DATA
Symbol
Rthj-amb
Parameter
Thermal Resistance Junction-ambient3
G1 G2
S1
Rating
N-channel P-channel
30 -30
±20 ±20
5 -4
4 -3.2
20 -20
2.0
0.016
-55 to 150
-55 to 150
Max.
Value
62.5
D2
S2
Units
V
V
A
A
A
W
W/
Unit
/W
08/17/2007 Rev.1.00
www.SiliconStandard.com
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SSM4532GM pdf
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SSM4532GM
N-Channel
6
5
4
3
2
1
0
25 50 75 100 125 150
T c , Case Temperature ( oC)
Fig 5. Maximum Drain Current v.s.
Case Temperature
3
2
1
0
0 50 100 150
T c ,Case Temperature ( oC)
Fig 6. Typical Power Dissipation
100
10
1
0.1
0.01
0.1
T C =25 oC
Single Pulse
1 10
V DS (V)
1ms
10ms
100ms
1s
10s
DC
100
1
Duty Factor = 0.5
0.2
0.1 0.1
0.05
0.02
0.01
0.01
Single Pulse
PDM
t
T
Duty Factor = t/T
Peak Tj = PDM x Rthja + Ta
Rthja =135 oC/W
0.001
0.0001
0.001
0.01 0.1
1
t , Pulse Width (s)
10
100 1000
Fig 7. Maximum Safe Operating Area
Fig 8. Effective Transient Thermal Impedance
08/17/2007 Rev.1.00
www.SiliconStandard.com
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P-Channel
VDS
RD 90%
D
VDS
TO THE
OSCILLOSCOPE
RG G
0.33 x RATED VDS
-10 V
S
VGS
10%
VGS
td(on) tr
SSM4532GM
td(off) tf
Fig 13. Switching Time Circuit
Fig 14. Switching Time Waveform
D
G
S
-1~-3mA
I
G
VDS
VGS
I
D
TO THE
OSCILLOSCOPE
0.33 x RATED VDS
VG
-10V
QGS
QG
QGD
Charge
Q
Fig 15. Gate Charge Circuit
Fig 16. Gate Charge Waveform
08/17/2007 Rev.1.00
www.SiliconStandard.com
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