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부품번호 | AKM4352 기능 |
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기능 | 2V & LOW POWER MULTI-BIT DAC | ||
제조업체 | Asahi Kasei Microsystems | ||
로고 | |||
www.DataSheet.co.kr
ASAHI KASEI
[AK4352]
AK4352
2V & Low Power Multi-Bit ∆Σ DAC
GENERAL DESCRIPTION
The AK4352 is an 18bit low voltage & power stereo DAC for digital audio system. The AK4352 uses the
new developed Multi-Bit ∆Σ architecture, this new architecture achieves DR=94dB at low voltage
operation. The AK4352 includes post filter with single-ended output and does not need any external parts.
The AK4352 is suitable for the portable audio system like MD, etc as low power and small package.
FEATURES
• Multi-Bit ∆Σ DAC
• Sampling Rate Ranging: 8kHz ∼ 50kHz
• On chip post filter
• On chip Buffer with Single-ended Output
• On chip Perfect filtering 8 times FIR interpolator
Passband: 20kHz
Passband Ripple: ± 0.06dB
Stopband Attenuation: 43dB
• Digital Audio I/F format: 2’s compliment, MSB first
18bit MSB justified, 16/18bit LSB justified, I2S
• Digital de-emphasis for 44.1kHz sampling
• Master clock: 256fs or 384fs
• THD+N: -83dB@2V, -89dB@3V
• D-Range: 94dB@2V, 96dB@3V
• Output Voltage: 1.10Vpp@2V
• Low Voltage Operation: 2V (1.8 ∼ 3.6V)
• Low power Dissipation: 6mW@2V
• Very Small Package: 16pin TSSOP
DIF0 DIF1
LRCK
BICK
SDATA
VDD
VSS
PD
Serial Input
Interface
8X
Interpolator
∆Σ
Modulator
De-emphasis
Control
8X
Interpolator
∆Σ
Modulator
Clock Divider
LPF
LPF
VCML
AOUTL
AOUTR
VCMR
DEM
MCLK CKS
VREF
M0040-E-02
-1-
2000/11
Datasheet pdf - http://www.DataSheet4U.net/
www.DataSheet.co.kr
ASAHI KASEI
[AK4352]
ANALOG CHARACTERISTICS
(Ta=25°C; VDD=2.0V, VREF=VDD; fs=44.1kHz; BICK=64fs; Signal Frequency=1kHz; 18bit Input Data;
Measurement frequency=10Hz ∼ 20kHz; RL ≥10kΩ; unless otherwise specified)
Parameter
min typ max Units
Dynamic Characteristics
(Note 3)
THD+N
(0dB Output)
-83 -74 dB
Dynamic Range
(-60dB Output, A-weight)
88
94
dB
S/N (A-weight)
88 94
dB
Interchannel Isolation
90 100
dB
DC Accuracy
Interchannel Gain Mismatch
0.1 0.5 dB
Gain Drift
- 60 - ppm/°C
Output Voltage
(Note 4)
1.02 1.10 1.18 Vpp
Load Resistance
10 kΩ
Power Supplies
Power Supply Current
Normal Operation ( PD = “H”)
VDD
3.0 4.7 mA
Power-Down Mode ( PD = “L”)
VDD
Power Dissipation (VDD)
Normal Operation
Power-Down Mode
Power Supply Rejection
(Note 5)
(Note 5)
10 50 µA
6.0 9.4 mW
20 100 µW
- 50 - dB
Note 3. Measured by AD725C (SHIBASOKU). Averaging mode.
In case of VDD=3.0V,
THD+N: -89dB
DR: 96dB (A-weight)
S/N: 97dB (A-weight)
Note 4. Full-scale voltage (0dB). Output voltage scales with the voltage of VREF.
AOUT (typ.@0dB)=1.10Vpp*VREF/2.
Note 5. In case of power-down mode, all digital input pins including clock pins (MCLK,BICK and LRCK) are held VDD
or VSS.
M0040-E-02
-4-
2000/11
Datasheet pdf - http://www.DataSheet4U.net/
4페이지 www.DataSheet.co.kr
ASAHI KASEI
[AK4352]
OPERATION OVERVIEW
n System Clock
The external clocks which are required to operate the AK4352 are MCLK (256fs/384fs) LRCK (fs), BICK (32fs ∼).
The master clock (MCLK) should be synchronized with LRCK but the phase is not critical. The frequency of MCLK
is determined by the sampling rate (LRCK) and CKS pin. Setting CKS= “L” selects an MCLK frequency of 256fs
while setting CKS= “H” selects 384fs. When the 384fs is selected, the internal master clock becomes
256fs(=384fs*2/3). Table 1 illustrates standard audio word rates and corresponding frequencies used in the AK4352.
All external clocks (MCLK, BICK and LRCK) should always be present whenever the AK4352 is in normal operation
mode ( PD = “H”). If these clocks are not provided, the AK4352 may draw excess current because the device utilizes
dynamic refreshed logic internally. If the external clocks are not present, the AK4352 should be in the power-down
mode( PD = “L”).
As the AK4352 includes the phase detection circuit for LRCK, the AK4352 adjusts the phase of LRCK automatically
when the synchronization is out of phase by changing the clock frequencies. Therefore, the reset is only needed for
power-up.
LRCK (fs)
32.0kHz
44.1kHz
48.0kHz
MCLK
CKS= “L”: 256fs CKS= “H”: 384fs
8.1920MHz
12.2880MHz
11.2896MHz
16.9344MHz
12.2880MHz
18.4320MHz
Table 1. Examples of System Clock
BICK (64fs)
2.0480MHz
2.8224MHz
3.0720MHz
256fs or 384fs
MCLK
2/3 H
CKS
L
Figure 1. Internal Clock Circuit
256fs
M0040-E-02
-7-
2000/11
Datasheet pdf - http://www.DataSheet4U.net/
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부품번호 | 상세설명 및 기능 | 제조사 |
AKM4352 | 2V & LOW POWER MULTI-BIT DAC | Asahi Kasei Microsystems |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |