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PDF AT29LV040A Data sheet ( Hoja de datos )
| Número de pieza | AT29LV040A | |
| Descripción | 4-megabit (512K x 8) 3-volt Only 256-byte Sector Flash Memory | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Single Voltage, Range 3V to 3.6V Supply
• 3-volt Only Read and Write Operation
• Software Protected Programming
• Fast Read Access Time – 150 ns
• Low Power Dissipation
– 15 mA Active Current
– 50 µA CMOS Standby Current
• Sector Program Operation
– Single Cycle Reprogram (Erase and Program)
– 2048 Sectors (256 Bytes/Sector)
– Internal Address and Data Latches for 256 Bytes
• Two 16K Bytes Boot Blocks with Lockout
• Fast Sector Program Cycle Time – 20 ms Max
• Internal Program Control and Timer
• DATA Polling for End of Program Detection
• Typical Endurance > 10,000 Cycles
• CMOS and TTL Compatible Inputs and Outputs
• Green (Pb/Halide-free) Packaging Option
1. Description
The AT29LV040A is a 3-volt only in-system Flash Programmable and Erasable Read
Only Memory (PEROM). Its 4 megabits of memory is organized as 524,288 words by
8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS EEPROM technology,
the device offers access times to 150 ns, and a low 54 mW power dissipation. When
the device is deselected, the CMOS standby current is less than 50 µA. The device
endurance is such that any sector can typically be written to in excess of 10,000
times. The programming algorithm is compatible with other devices in Atmel’s 3-volt
only Flash memories.
To allow for simple in-system reprogrammability, the AT29LV040A does not require
high input voltages for programming. Three-volt-only commands determine the opera-
tion of the device. Reading data out of the device is similar to reading from an
EPROM. Reprogramming the AT29LV040A is performed on a sector basis; 256 bytes
of data are loaded into the device and then simultaneously programmed.
During a reprogram cycle, the address locations and 256 bytes of data are captured at
microprocessor speed and internally latched, freeing the address and data bus for
other operations. Following the initiation of a program cycle, the device will automati-
cally erase the sector and then program the latched data using an internal control
timer. The end of a program cycle can be detected by DATA polling of I/O7. Once the
end of a program cycle has been detected, a new access for a read or program can
begin.
4-megabit
(512K x 8)
3-volt Only
256-byte Sector
Flash Memory
AT29LV040A
0334H–FLASH–9/08
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AT29LV040A
4.8 Optional Chip Erase Mode
The entire device can be erased by using a 6-byte software code. Please see Software Chip
Erase application note for details.
4.9 Boot Block Programming Lockout
The AT29LV040A has two designated memory blocks that have a programming lockout feature.
This feature prevents programming of data in the designated block once the feature has been
enabled. Each of these blocks consists of 16K bytes; the programming lockout feature can be
set independently for either block. While the lockout feature does not have to be activated, it can
be activated for either or both blocks.
These two 16K memory sections are referred to as boot blocks. Secure code which will bring up
a system can be contained in a boot block. The AT29LV040A blocks are located in the first 16K
bytes of memory and the last 16K bytes of memory. The boot block programming lockout feature
can therefore support systems that boot from the lower addresses of memory or the higher
addresses. Once the programming lockout feature has been activated, the data in that block can
no longer be erased or programmed; data in other memory locations can still be changed
through the regular programming methods. To activate the lockout feature, a series of seven
program commands to specific addresses with specific data must be performed. Please see
Boot Block Lockout Feature Enable Algorithm.
If the boot block lockout feature has been activated on either block, the chip erase function will
be disabled.
4.9.1
Boot Block Lockout Detection
A software method is available to determine whether programming of either boot block section is
locked out. See Software Product Identification Entry and Exit sections. When the device is in
the software product identification mode, a read from location 00002H will show if programming
the lower address boot block is locked out while reading location.
7FFF2H will do so for the upper boot block. If the data is FE, the corresponding block can be
programmed; if the data is FF, the program lockout feature has been activated and the corre-
sponding block cannot be programmed. The software product identification exit mode should be
used to return to standard operation.
5. Absolute Maximum Ratings*
Temperature Under Bias............................... -55° C to +125° C
Storage Temperature .................................... -65° C to +150° C
All Input Voltages (Including NC Pins)
with Respect to Ground ...................................-0.6V to +6.25V
All Output Voltages
with Respect to Ground .............................-0.6V to VCC + 0.6V
Voltage on A9 (Including NC Pins)
with Respect to Ground ...................................-0.6V to +13.5V
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.
0334H–FLASH–9/08
5
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19. Data Polling Characteristics(1)
Symbol Parameter
tDH
tOEH
tOE
tWR
Notes:
Data Hold Time
OE Hold Time
OE to Output Delay(2)
Write Recovery Time
1. These parameters are characterized and not 100% tested.
2. See tOE spec in AC Read Characteristics.
20. Data Polling Waveforms
AT29LV040A
Min Typ Max Units
10 ns
10 ns
ns
0 ns
21. Toggle Bit Characteristics(1)
Symbol Parameter
tDH
tOEH
tOE
tOEHP
tWR
Notes:
Data Hold Time
OE Hold Time
OE to Output Delay(2)
OE High Pulse
Write Recovery Time
1. These parameters are characterized and not 100% tested.
2. See tOE spec in AC Read Characteristics.
22. Toggling Bit Waveforms(1)(3)
Min Typ Max Units
10 ns
10 ns
ns
150 ns
0 ns
Notes:
1. Toggling either OE or CE or both OE and CE will operate toggle bit.
2. Beginning and ending state of I/O6 will vary.
3. Any address location may be used by the address should not vary.
0334H–FLASH–9/08
11
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