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PDF LP171WP4-TLN1 Data sheet ( Hoja de datos )

Número de pieza LP171WP4-TLN1
Descripción Display Module
Fabricantes LG 
Logotipo LG Logotipo



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Product Specification
SPECIFICATION
FOR
APPROVAL
LP171WP4
Liquid Crystal Display
( ) Preliminary Specification
( ) Final Specification
Title
Customer
MODEL
SONY
17.1WXGA+ TFT LCD
SUPPLIER
LG.Philips LCD Co., Ltd.
*MODEL
LP171WP4
Suffix
TLN1
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
/
/
/
SIGNATURE
Please return 1 copy for your confirmation with
your signature and comments.
APPROVED BY
SIGNATURE
K. S. Kwon / S.Manager
REVIEWED BY
J. H. Park / Manager
PREPARED BY
S. W. Park / Engineer
Y. J. Park / Engineer
Products Engineering Dept.
LG. Philips LCD Co., Ltd
Ver. 1.0
Dec. 11, 2007
1 / 31
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LP171WP4-TLN1 pdf
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Product Specification
LP171WP4
Liquid Crystal Display
2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
Symbol
VCC
TOP
HST
HOP
HST
Values
Min Max
-0.3 4.0
0 50
-20 60
10 90
10 90
Units
Vdc
°C
°C
%RH
%RH
Notes
at 25 ± 5°C
1
1
1
1
Note : 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39°C Max, and no condensation of water.
90% 80%
60 60%
Wet Bulb
Temperature []
50
40
30
20
10
0
40%
20%
10%
-20 0 10 20 30 40 50 60 70 80
Dry Bulb Temperature []
Storage
Operation
Ver. 1.0
Dec. 11, 2007
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LP171WP4-TLN1 arduino
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Product Specification
LP171WP4
Liquid Crystal Display
3-4. Signal Timing Specifications
This is the signal timing required at the input of the User connector. All of the interface signal timing should be
satisfied with the following specifications and specifications of LVDS Tx/Rx for its proper operation.
Table 6. TIMING TABLE
ITEM
Symbol
Min Typ
Max
Unit
Note
DCLK
Hsync
Vsync
Data
Enable
Frequency
Period
Width
Width-Active
Period
Width
Width-Active
Horizontal back porch
Horizontal front porch
Vertical back porch
Vertical front porch
fCLK
Thp
tWH
tWHA
tVP
tWV
tWVA
tHBP
tHFP
tVBP
tVFP
43.0
832
8
720
908
2
900
88
16
4
2
48.1
880
16
720
912
3
900
112
32
6
3
52.0 MHz 1port : fCLK * 2
920
24 tCLK 1port : fCLK * 2
720
924
5 tHP
900
128 1port : fCLK * 2
tCLK
48 1port : fCLK * 2
13
tHP
6
3-5. Signal Timing Waveforms
Data Enable, Hsync, Vsync
DCLK
tCLK
0.5 Vcc
High: 0.7VCC
Low: 0.3VCC
Condition : VCC =3.3V
Hsync tWH
Data Enable
tHBP
tWV
Vsync
Data Enable
tVBP
Ver. 1.0
tHP
tWHA
tVP
tWVA
Dec. 11, 2007
tHFP
tVFP
11 / 31
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