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PDF LB070W02-A5 Data sheet ( Hoja de datos )
| Número de pieza | LB070W02-A5 | |
| Descripción | Display Module | |
| Fabricantes | LG | |
| Logotipo |  |
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Product Specification
LB070W02
Liquid Crystal Display
SPECIFICATION
FOR
APPROVAL
( ● ) Preliminary Specification
( ) Final Specification
Title
BUYER
MODEL
7.0”W (480 X RGB X 234) TFT-LCD
SUPPLIER
MODEL
SUFFIX
LG.Philips LCD Co., Ltd.
LB070W02
A5
SIGNATURE
/
/
/
Ver. 1.1
DATE
APPROVED BY
C.S. KYOUNG /G.Manager
REVIEWED BY
J.D. KIM /Manager
PREPARED BY
C.S. SO /Engineer
DATE
Product Engineering Dept.
LG. Philips LCD Co., Ltd
May. 06, 2003
1 / 24
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1 page  
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Product Specification
4. Interface (Input terminal)
1> TFT-LCD Panel Driving Part
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
SYMBOL
VDD1
VDD1
DS
U/D
STV
CLK
OE
DSOE
DGND
VGL
VGH
AGND
AGND
VDD2
VDD2
VB
VG
VR
DGND
STHL
SEQ/SIM
L/R
RESET
INH
CLI1
CLI2
CLI3
STHR
VEE
VCOM
FUNCTION
Power Line For Logic
Power Line For Logic
Gate Driver Double Scan Control
Up/Down Scanning Change
Gate Scanning Start Signal (GSP)
Gate Driver Scanning Clock Pulse (GSC)
Gate Driver Output Enable (GOE)
Gate Driver Double Scan Pulse Width Control
Ground For Logic Circuit
Gate Driver Negative Voltage
Gate Driver Positive Voltage
Ground For Analog Circuit
Ground For Analog Circuit
Power Line For Source Driver IC
Power Line For Source Driver IC
Blue Analog Video Signal
Green Analog Video Signal
Red Analog Video Signal
Ground For Logic Circuit
Source Scanning Left Start Signal (SSP_L)
Sampling Mode Change
Left/Right Scanning Change
Source Driver Reset
Source Driver Output Enable (SOE)
Source Driver Clock Input 1(SSC_1)
Source Driver Clock Input 2 (SSC_2)
Source Driver Clock Input 3 (SSC_3)
Source Scanning Right Start Signal (SSP_R)
Gate Driver Negative Voltage For Internal Operation
Voltage Applied To Color Filter Substrate
Ver. 1.1
May. 06, 2003
LB070W02
Liquid Crystal Display
REMARK
5 / 24
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Product Specification
LB070W02
Liquid Crystal Display
2> Timing Characteristics of input signals
PARAMETER
SYMBOL MIN. TYP. MAX. UNIT
REMARK
Clock Pulse Width
PWCLI 33 - - ns
Start Pulse Setup Time
tSETUP
8-
-
ns
S Start Pulse Hold Time
tHOLD
8-
-
ns
O Reset Pulse Width PWRES 66 - - ns
U
R
INH Setup Time
tISETUP 33 - - ns
C INH Hold Time
tIHOLD 33 - - ns
E Reset-INH Time
tR-I 81 - - ns
INH Pulse Width
PWINH 5 -
- CLK
***** Keep the rise and fall times of the logic input signals to within tr=tf=5ns (10 to 90%).
Clock Pulse High Width
PWCLK(H)
(500)
-
ns
Clock Pulse Low Width
PWCLK(L)
(500)
-
ns
G Enable Pulse Width
A Start Pulse Setup Time
T Start Pulse Hold Time
E
Double Scan Setup Time
PWOE
tSETUP1
tHOLD1
tSETUP2
(1000)
(200)
(200)
(200)
-
-
-
-
ns
ns
ns
ns
Double Scan Hold Time
tHOLD2
(200)
-
ns
***** The value enclosed in parentheses is a reference value.
3> Signal For Reverse Scanning
MODE
Normal Mode
Right/Left Reverse Mode
Up/Down Reverse Mode
Left/Right & Up/Down Reverse Mode
L/R U/D
LL
HL
LH
HH
STHL
Signal Input
Signal Output
Signal Input
Signal Output
***** H(High Level) =VDD1 / L(Low Level)=DGND
STHR
Signal Output
Signal Input
Signal Output
Signal Input
STV
Input
Input
Input
Input
REMARK
Ver. 1.1
May. 06, 2003
11 / 24
Datasheet pdf - http://www.DataSheet4U.net/
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