|
|
PDF FM24C64C Data sheet ( Hoja de datos )
| Número de pieza | FM24C64C | |
| Descripción | 64Kb Serial 5V F-RAM Memory | |
| Fabricantes | Ramtron | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de FM24C64C (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
|
No Preview Available !
www.DataSheet.co.kr
Preliminary
FM24C64C
64Kb Serial 5V F-RAM Memory
Features
64K bit Ferroelectric Nonvolatile RAM
Organized as 8,192 x 8 bits
High Endurance 1 Trillion (1012) Read/Writes
36 Year Data Retention at +75C
NoDelay™ Writes
Advanced High-Reliability Ferroelectric Process
Fast Two-wire Serial Interface
Up to 1 MHz maximum bus frequency
Direct hardware replacement for EEPROM
Supports legacy timing for 100 kHz & 400 kHz
Description
The FM24C64C is a 64-kilobit nonvolatile memory
employing an advanced ferroelectric process. A
ferroelectric random access memory or FRAM is
nonvolatile and performs reads and writes like a
RAM. It provides reliable data retention for 36 years
while eliminating the complexities, overhead, and
system level reliability problems caused by
EEPROM and other nonvolatile memories.
The FM24C64C performs write operations at bus
speed. No write delays are incurred. Data is written to
the memory array in the cycle after it has been
successfully transferred to the device. The next bus
cycle may commence immediately without the need
for data polling. The FM24C64C is capable of
supporting 1012 read/write cycles, or a million times
more write cycles than EEPROM.
These capabilities make the FM24C64C ideal for
nonvolatile memory applications requiring frequent
or rapid writes. Examples range from data collection
where the number of write cycles may be critical, to
demanding industrial controls where the long write
time of EEPROM can cause data loss. The
combination of features allows more frequent data
writes with less overhead for the system.
The FM24C64C provides substantial benefits to users
of serial EEPROM, yet these benefits are available in
a hardware drop-in replacement. The FM24C64C is
available in an industry standard 8-pin SOIC package
and uses a familiar two-wire protocol. The
specifications are guaranteed over an industrial
temperature range of -40°C to +85°C.
Low Power Operation
5V operation
100 A Active Current (100 kHz)
4 A (typ.) Standby Current
Industry Standard Configuration
Industrial Temperature -40 C to +85 C
8-pin “Green”/RoHS SOIC (-G)
Pin Configuration
A0
A1
A2
VSS
1
2
3
4
8 VDD
7 WP
6 SCL
5 SDA
Pin Names
A0-A2
SDA
SCL
WP
VSS
VDD
Function
Device Select Address
Serial Data/address
Serial Clock
Write Protect
Ground
Supply Voltage
Ordering Information
FM24C64C-G
“Green”/RoHS 8-pin SOIC
FM24C64C-GTR “Green”/RoHS 8-pin SOIC,
Tape & Reel
This is a product that has fixed target specifications but are subject
to change pending characterization results.
Rev. 1.1
June 2011
Ramtron International Corporation
1850 Ramtron Drive, Colorado Springs, CO 80921
(800) 545-FRAM, (719) 481-7000
www.ramtron.com
Page 1 of 12
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
www.DataSheet.co.kr
Slave
ID
Dev ice
Select
1 0 1 0 A2 A1 A0 R/W
7 6 5 43 2 1 0
Figure 4. Slave Address
Addressing Overview
After the FM24C64C (as receiver) acknowledges the
device address, the master can place the memory
address on the bus for a write operation. The address
requires two bytes. The first is the MSB (upper byte).
Since the device uses only 13 address bits, the value
of the upper three bits are don’t care. Following the
MSB is the LSB (lower byte) with the remaining
eight address bits. The address value is latched
internally. Each access causes the latched address
value to be incremented automatically. The current
address is the value that is held in the latch, either a
newly written value or the address following the last
access. The current address will be held as long as
power remains or until a new value is written. Reads
always use the current address. A random read
address can be loaded by beginning a write operation
as explained below.
After transmission of each data byte and just prior to
the acknowledge, the FM24C64C increments the
internal address latch. This allows the next sequential
byte to be accessed with no additional addressing
externally. After the last address (1FFFh) is reached,
the address latch will roll over to 0000h. There is no
limit to the number of bytes that can be accessed with
a single read or write operation.
Data Transfer
After the address information has been transmitted,
data transfer between the bus master and the
FM24C64C can begin. For a read operation, the
FM24C64C will place 8 data bits on the bus then
wait for an Acknowledge from the master. If the
Acknowledge occurs, the FM24C64C will transfer
the next sequential byte. If the Acknowledge is not
sent, the FM24C64C will end the read operation. For
a write operation, the FM24C64C will accept 8 data
bits from the master and then send an Acknowledge.
All data transfer occurs MSB (most significant bit)
first.
FM24C64C
Memory Operation
The FM24C64C is designed to operate in a manner
very similar to other 2-wire interface memory
products. The major differences result from the
higher performance write capability of FRAM
technology. These improvements result in some
differences between the FM24C64C and a similar
configuration EEPROM during writes. The
complete operation for both writes and reads is
explained below.
Write Operation
All writes begin with a device address, then a
memory address. The bus master indicates a write
operation by setting the LSB of the device address
to a 0. After addressing, the bus master sends each
byte of data to the memory and the memory
generates an acknowledge condition. Any number of
sequential bytes may be written. If the end of the
address range is reached internally, the address
counter will wrap from 1FFFh to 0000h.
Unlike other nonvolatile memory technologies,
there is no write delay with FRAM. The entire
memory cycle occurs in less time than a single bus
clock. Therefore, any operation including a read or
write can occur immediately following a write.
Acknowledge polling, a technique used with
EEPROMs to determine if a write is complete is
unnecessary and will always return a ready
condition.
Internally, the actual memory write occurs after the
8th data bit is transferred. It will be complete before
the Acknowledge is sent. Therefore, if the user
desires to abort a write without altering the memory
contents, this should be done using a Start or Stop
condition prior to the 8th data bit. The FM24C64C
uses no page buffering.
Portions of the memory array can be write protected
using the WP pin. Pulling the WP pin high (VDD)
will write-protect addresses in the upper quadrant
from 1800h to 1FFFh. The FM24C64C will not
acknowledge data bytes that are written to protected
addresses. In addition, the address counter will not
increment if writes are attempted to these addresses.
Pulling WP low (VSS) will deactivate this feature.
WP should not be left floating.
Figures 5 and 6 illustrate both a single-byte and
multiple-byte write cases.
Rev. 1.1
June 2011
5 of 12
Datasheet pdf - http://www.DataSheet4U.net/
5 Page 
www.DataSheet.co.kr
Mechanical Drawing
8-pin SOIC (JEDEC Standard MS-012 variation AA)
FM24C64C
Recommended PCB Footprint
Pin 1
4.90 ±0.10
3.90 ±0.10 6.00 ±0.20
1.35
1.75
2.00
1.27
0.25
0.50
7.70
3.70
0.65
0.19
45 0.25
1.27 0.10
0.33 0.25
0.51
0.10 mm
0-8
0.40
1.27
Refer to JEDEC MS-012 for complete dimensions and notes.
All dimensions in millimeters.
SOIC Package Marking Scheme
XXXXXXX-P
LLLLLLL
RICYYWW
Legend:
XXXXXX= part number, P= package type
R=rev code, LLLLLLL= lot code
RIC=Ramtron Int’l Corp, YY=year, WW=work week
Example: FM24C64C, “Green” SOIC package, Year 2010, Work Week 47
FM24C64C-G
A00002G1
RIC1047
Rev. 1.1
June 2011
11 of 12
Datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet FM24C64C.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| FM24C64 | 64K-Bit Standard 2-Wire Bus Interface Serial EEPROM |  Fairchild Semiconductor |
| FM24C64B | 64-Kbit (8K x 8) Serial (I2C) F-RAM |  Cypress Semiconductor |
| FM24C64B | 64Kb Serial 5V F-RAM Memory | Ramtron |
| FM24C64C | 64Kb Serial 5V F-RAM Memory | Ramtron |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |