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PDF 72722PM Data sheet ( Hoja de datos )
| Número de pieza | 72722PM | |
| Descripción | Single-Chip RDS Signal-Processing System IC | |
| Fabricantes | Sanyo Semicon Device | |
| Logotipo |  |
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Ordering number : ENN6123A
CMOS IC
LC72722, 72722M, 72722PM
Single-Chip RDS
Signal-Processing System LSI
Overview
The LC72722 and LC72722M, LC72722PM are single-
chip system ICs that implement the signal processing
required by the European Broadcasting Union RDS (Radio
Data System) standard and by the US NRSC (National
Radio System Committee) RDBS (Radio Broadcast Data
System) standard. These ICs include band-pass filter,
demodulator, synchronization, and error correction circuits
as well as data buffer RAM on chip and perform effective
error correction using a soft-decision error correction
technique.
Functions
• Band-pass filter: Switched capacitor filter (SCF)
• Demodulator: RDS data clock regeneration and
demodulated data reliability information
• Synchronization: Block synchronization detection (with
variable backward and forward protection conditions)
• Error correction: Soft-decision/hard-decision error
correction
• Buffer RAM: Adequate for 24 blocks of data (about 500
ms) and flag memory
• Data I/O: CCB interface (power on reset)
Features
• Error correction capability improved by soft-decision
error correction
• The load on the control microprocessor can be reduced
by storing decoded data in the on-chip data buffer RAM.
• Two synchronization detection circuits provide
continuous and stable detection of the synchronization
timing.
• Data can be read out starting with the backward-
protection block data after a synchronization reset.
• Bit slip detection and correction
• Low spurious radiation
• Fully adjustment free
• Operating power-supply voltage: 4.5 to 5.5 V
• Operating temperature: –40 to +85°C
• Package: LC72722 : DIP24S
LC72722M : MFP24S
LC72722PM : MFP24
Package Dimensions
unit: mm
3067A-DIP24S
[LC72722]
21.0
24 13
1
0.9
12
(0.71) 1.78 0.48
0.95
SANYO: DIP24S
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
51202AS (OT)/83199TH (OT) No. 6123-1/15
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
www.DataSheet.co.kr
LC72722, 72722M, 72722PM
Continued from preceding page.
Parameter
Symbol
Conditions
Stop band attenuation
pull-up resistor used.Reference voltage output
Hysteresis
Output low-level voltage
Input high-level current
Input low-level current
Output off leakage current
Current drain
Att1
Att2
Att3
Vref
VHIS
VOL1
VOL2
IIH1
IIH2
IIL1
IIL2
IOFF
Idd
FLOUT : Δf = ±7 kHz
FLOUT : f < 45 kHz, f > 70 kHz
FLOUT : f < 20 kHz
VREF : Vdda = 5 V
CL, DI, CE, SYR, T1, T2
DO, T3, T4, T5, T6, T7 : I = 2 mA
SYNC, RDS-ID : I = 8 mA
CL, DI, CE, SYR, T1, T2 : VI = 6.5 V
XIN : VI = Vddd
CL, DI, CE, SYR, T1, T2 : VI = 0 V
XIN : VI = 0 V
DO, SYNC, RDS-ID, T3, T4, T5, T6, T7 :
VO = 6.5 V
Vddd + Vdda
min
30
40
50
Ratings
typ
2.5
0.1 Vddd
2.0
2.0
9
max
0.4
0.4
5.0
11
5.0
11
5.0
Unit
dB
dB
dB
V
V
V
V
μA
μA
μA
μA
μA
mA
CCB Output Data Format
• Each block of output data consists of 32 bits (4 bytes), of which 2 bytes are RDS data and 2 bytes are flag data.
• Any number of 32-bit output data blocks can be output consecutively.
• When there is no data that can be read out in the internal memory, the system outputs blocks of all-zero data
consecutively.
• If data readout is interrupted, the next read operation starts with the 32-bit data block whose readout was interrupted.
However, if only the last bit remains to be read, it will not be possible to reread that whole block.
• The check bits (10 bits) are not output.
• The data valid/invalid decision is made by referencing the error information flags (E0 to E2) must not be referred to.
• When the first leading bits are not "1010", the read in data is invalid, and the read operation is cancelled.
CCB address 6C
B BB B AA AA
DI 0 1 2 3 0 1 2 3
00110 110
Output data/first bit
Last bit
DO
1
0
1
0
O
W
D
B
2
B
1
B
0
R
E
R
F
1
R
F
0
A
R
I
S
Y
C
E
2
E
1
E
0
D
1
5
D
1
4
D
1
3
D
1
2
D
1
1
D
1
0
D
9
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
1. Offset word detection flag (1 bit): OWD
OWD
1
0
Offset word detection
Detected
Not detected (protection function operating)
(8) RDS data
(7) Error information flags
(6) Synchronization established flag
(5) ARI (SK) detection flag
(4) RAM data remaining flag
(3) Consecutive RAM read out possible flag
(2) Offset word information flag
(1) Offset word detection flag
Fixed pattern (1010)
No. 5602-5/15
Datasheet pdf - http://www.DataSheet4U.net/
5 Page 
www.DataSheet.co.kr
LC72722, 72722M, 72722PM
Timing 2 (mode 3, PT2 = 0)
Input data
Sync NG Sync OK Sync OK Sync OK Sync OK Sync OK Sync NG Sync NG
Error correction
SYNC output
ERROR output
Data
No
corrected errors
Tp1
No Data Uncorrectable Uncorrectable
errors corrected
Tp1
CORREC output
A12378
Serial Data Input and Output Methods
Data is input and output using the CCB (computer control bus), which is the Sanyo audio IC serial bus format. This IC
adopts an 8-bit address CCB format.
(LSB)
Address
(MSB)
I/O mode B0 B1 B2 B3 A0 A1 A2 A3
Comment
· Control data input mode, also referred to as “serial data input” mode.
1
IN1 (6A)
0 1 0 1 0 1 1 0 · This is a 16-bit data input mode.
· Control data input mode, also referred to as “serial data input” mode.
2
IN2 (6B)
1 1 0 1 0 1 1 0 · This is a 16-bit data input mode.
· Data output mode, also referred to as “serial data output” mode.
3 OUT (6C) 0 0 1 1 0 1 1 0 · The data for multiple blocks can be output sequentially in this mode.
I/O mode determined
CE
1
CL
2
DI
1
DO
2
B0 B1 B2 B3 A0 A1 A2
1 For the CL normal high state
2 For the CL normal low state
A3
First Data IN1/2
First Data OUT
First Data OUT
A12379
No. 5602-11/15
Datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
| Páginas | Total 15 Páginas | |
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