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PDF ST6G3244ME Data sheet ( Hoja de datos )
| Número de pieza | ST6G3244ME | |
| Descripción | Level translator | |
| Fabricantes | STMicroelectronics | |
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ST6G3244ME
Level translator for SD, SDIO, mini SD, and micro SD Cards
with internal I/O supply and ±15 kV ESD protection
Features
■ Supports 60 MHz clock rate
■ Supports DDR mode for SD Card™
■ Compliant with
– SD Specification Part 1 Physical Layer
Specification 3.00 (SDR12, SDR25,
DDR50)
– SD Specification Part 1 Physical Layer
Specification 2.00
■ Bi-directional with direction control pin
■ Balanced propagation delays: tPLH ≈ tPHL
■ LDO power-down support. When the LDO is
powered down, VCCB is pulled to GND via
the 130 Ω resistor. When VCCB = 0 V, there is
no additional leakage seen on VCCA.
■ EMI filtering and signal conditioning
■ Supports both 1.8 V and 2.9 V data translation
on card side
■ Integrated LDO to supply 1.8 V or 2.9 V power
for B-side I/Os (pin-selectable); can be used
also externally
■ Integrated pull-up and pull-down resistors on
B-side
■ Operating voltage range
– VCCA = 1.62 V to 1.98 V
– VBAT = 3.0 V to 5.0 V
■ Latch-up performance exceeds 100 mA
(JEDEC Standard 78)
■ ESD protection for card side (B-port, CD and
WP pins)
– ±8 kV contact discharge (IEC61000-4-2)
– ±15 kV air-gap discharge (IEC61000-4-2)
■ ESD protection for host side (A-side)
– ±2 kV HBM (JEDEC 22-A114)
– ±200 V MM (JEDEC 22-A115)
Flip Chip 25
■ Operating temperature range –40 °C to +85 °C
■ Space-saving Flip Chip 25 package
(2 x 2 x 0.605 mm, 0.4 mm bump pitch)
■ RoHS compliant, lead-free soldering capable
Applications
■ Mobile phones, smartphones
■ PDAs
■ Cameras
■ SD Card readers
■ Any device with SD memory card
Table 1. Device summary
Order code
Package
Packing
Package
topmark
Flip Chip 25
2x2x
ST6G3244MEBJR 0.605 mm,
0.4 mm
bump pitch
Tape
and reel
(5000
parts per
reel)
VKH,
VKV
November 2011
Doc ID 022157 Rev 2
1/27
www.st.com
1
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
www.DataSheet.co.kr
ST6G3244ME
1 Description
Description
The ST6G3244ME is a dual supply, low voltage 6-bit bi-directional CMOS level translator for
SD, mini SD and micro SD Cards. Designed for use as an interface between baseband and
memory cards, it achieves high speed operation while maintaining CMOS low-power
dissipation.
The A-port is designed to track VCCA. The internal LDO is powered by VBAT and provides
a power supply of either 1.8 V or 2.9 V to the B-side I/Os (programmed by the SEL pin).
The B-port is designed to track VCCB. The VCCB voltage can be also used externally. When
VCCB = 0 V, there is no additional leakage seen on VCCA. All outputs are push-pull type.
This device is intended for two-way asynchronous communication between data buses.
The direction of data transmission is determined by CMD.dir, DAT0.dir and DAT123.dir
inputs.
All inputs are equipped with protection circuits against electrostatic discharge, giving them
±2 kV (on A-side) and ±15 kV (on B-side, CD and WP) ESD and transient excess voltage
immunity.
Doc ID 022157 Rev 2
5/27
Datasheet pdf - http://www.DataSheet4U.net/
5 Page 
www.DataSheet.co.kr
ST6G3244ME
4 DC and AC parameters
DC and AC parameters
Table 5. Recommended operating conditions
Symbol
Parameter
Conditions
VCCA
VBAT
CBAT
CVCCA
CVCCB
Power supply
Battery power supply
External battery capacitance
VCCA decoupling capacitor
Internal supply voltage (VCCB)
decoupling capacitor
Ceramic capacitor
Ceramic capacitor
Ceramic capacitor
TA
TJ
PD
VIO_B
Ambient operating temperature
Junction operating temperature
Maximum power dissipation
I/O voltage on external pins
(without WP and CD) - B-side
PD = (TJ - TA)/RTH(J-A)
CMDB, CLKB, DAT0B, DAT1B, DAT2B,
DAT3B
VIO_A
I/O voltage on internal pins
(includes WP and CD) - A-side
EN, SEL, WP, CD, DAT123.dir, CMD.dir,
CMD.h, CLK.h, CLK-f, DAT0.dir, DAT0.h,
DAT1.h, DAT2.h, DAT3.h
Min. Typ. Max. Unit
1.62 1.8 1.98 V
3.0 5.0 V
1.0 2.2 2.8 µF
0.1 µF
1.0 2.2 2.8 µF
–40 25 85 °C
–40 25 125 °C
625 mW
0 VCCB V
0 VCCA V
Table 6.
Symbol
Current levels under recommended operating conditions (TA = –40 °C to 85 °C)
Parameter
Test conditions(1)
Min. Typ. Max. Unit
IQ_OFF
IQ_ON
Quiescent current consumption
ICCA_OFF
Quiescent current consumption
IBAT_OFF
VEN = 0.4 V, VBAT = 3.4 V, VCCA = 1.98 V
*.dir, *B = 0 V, WP = CD = VCCA
All other pins floating
Quiescent current consumption *.dir = 0 V, VBAT = 3.4 V
(Ground pin current)
VEN = VCCA = VCLK.h =
1.98 V
IBAT + ICCA
All other pins floating
IOUT = 100 µA
IOUT = 50 mA
ICCA_ON Quiescent current on VCCA
VEN = VCCA = 1.92 V, VBAT = 3.4 V,
*.dir = VCCA, VIA = *.h = VCCA
1 µA
1 µA
150(2)
µA
250(2)
3 10 µA
1. Collective names for groups of pins:
*.dir = CMD.dir, DAT0.dir, DAT123.dir
*.h = CMD.h, CLK.h, DAT0.h, DAT1.h, DAT2.h, DAT3.h
*B = CMDB, CLKB, DAT0B, DAT1B, DAT2B, DAT3B
VIA = all A-side input pins.
2. Guaranteed by design.
Doc ID 022157 Rev 2
11/27
Datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
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