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부품번호 P3P8163A 기능
기능 LVCMOS Spread Spectrum Peak EMI Reduction Device
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P3P8163A 데이터시트, 핀배열, 회로
www.DataSheet.co.kr
P3P8163A
3.3V, LVCMOS Spread
Spectrum Peak EMI
Reduction Device
Product Description
P3P8163A is a 3.3 V, spread spectrum frequency modulator that
generates a 1x, LVCMOS low EMI spread spectrum clock and two
reference clock outputs.
The P3P8163A reduces electromagnetic interference (EMI) at the
clock source, allowing system wide reduction of EMI of down stream
clock and data dependent signals. It allows significant system cost
savings by reducing the number of circuit board layers, ferrite beads,
shielding, and other passive components that are traditionally required
to pass EMI regulations.
The P3P8163A can generate an EMI reduced clock from a
fundamental Crystal or from an external reference clock.
P3P8163A has a SEL pin to turn off CLK2 when ‘1’.
Refer Output Table.
P3P8163A operates over 3.3 V ±5% supply voltage range and is
available in 8 pin SOIC package.
Features
Input Clock: 12 MHz from Fundamental XTAL or External
Reference Clock
Output Clocks:
CLK0: 12 MHz ±0.4%
CLK1, CLK2: 12 MHz (REFOUT)
SEL Pin to Turn Off CLK2
Low Inherent CycletoCycle Jitter
Supply Voltage: 3.3 V ±5%
LVCMOS Input and Output
Operating Temperature Range: 0°C to 70°C
8pin SOIC Package
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
Application
The P3P8163A is targeted towards EMI management in consumer
electronics applications including MFPs.
http://onsemi.com
8
1
SOIC8
D SUFFIX
CASE 751
xx
A
L
Y
W
G
MARKING DIAGRAM
8
ALYWG
G
1
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= PbFree Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
XOUT
8
1
XIN/CLKIN
Crystal
Oscillator
VDD
7
PLL
+
Frequency Modulator
CLK0
2
CLK1
5
CLK2
6
43
GND
SEL
Figure 1. Simplified Block Diagram
© Semiconductor Components Industries, LLC, 2011
September, 2011 Rev. 0
1
Publication Order Number:
P3P8163A/D
Datasheet pdf - http://www.DataSheet4U.net/




P3P8163A pdf, 반도체, 판매, 대치품
www.DataSheet.co.kr
P3P8163A
Table 6. AC ELECTRICAL CHARACTERISTICS
(NOTE Unless otherwise stated VDD = 3.3 V ± 5%, CL = 15 pF and Ambient Temperature range 0°C to +70°C)
Symbol
Parameter
Min Typ
fIN
fOUT
Input Clock frequency
CLK0, Modulated output Clock, ±0.4%
CLK1, CLK2 Reference clock output
12
12
12
tLH, tHL
(Notes 1 and 2)
CLK0, Rise and Fall time
(Measured between 20% to 80%)
1.25
tLH, tHL
(Notes 1 and 2)
CLK1, CLK2, Rise and Fall time
(Measured between 20% to 80%)
1.25
TDCOUT
(Notes 1 and 2)
Output Clock Duty Cycle
45 50
TJC (Note 2)
TJP (Note 2)
tON
(Notes 1 and 2)
CycleCycle Jitter, Peak (1000 cycles) (For CLK0)
Period Jitter, Peak (10000 cycles) (For CLK1, CLK2)
Power Up Time (Stable power supply, valid input clock to valid clock on
CLK0).
150
125
fdvar Frequency Deviation (CLK0)
1. Parameters are specified with 15 pF loaded outputs.
2. Parameter is guaranteed by design and characterization. Not 100% tested in production
±0.4
Max
2.0
2.0
55
4
±0.52
Unit
MHz
MHz
ns
ns
%
pS
pS
ms
%
R
Crystal
Rx
CL CL
CL = 2*(CP – CS),
Where CP = Load capacitance of crystal specified in a
Crystal Datasheet
CS = Stray capacitance due to CIN, PCB, Trace etc
CL =Load capacitance to be used
Rx is used to reduce power dissipation in the Crystal
Figure 3. Typical Crystal Interface Circuit
http://onsemi.com
4
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부품번호상세설명 및 기능제조사
P3P8163A

LVCMOS Spread Spectrum Peak EMI Reduction Device

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