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PDF 1207A Data sheet ( Hoja de datos )
| Número de pieza | 1207A | |
| Descripción | NCP1207A | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 1207A (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
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NCP1207A
PWM Current−Mode
Controller for Free Running
Quasi−Resonant Operation
The NCP1207A combines a true current mode modulator and a
demagnetization detector to ensure full borderline/critical Conduction
Mode in any load/line conditions and minimum drain voltage
switching (Quasi−Resonant operation). Due to its inherent skip cycle
capability, the controller enters burst mode as soon as the power
demand falls below a predetermined level. As this happens at low peak
current, no audible noise can be heard. An internal 8.0 ms timer
prevents the free−run frequency to exceed 100 kHz (therefore below
the 150 kHz CISPR−22 EMI starting limit), while the skip adjustment
capability lets the user select the frequency at which the burst foldback
takes place.
The Dynamic Self−Supply (DSS) drastically simplifies the
transformer design in avoiding the use of an auxiliary winding to
supply the NCP1207A. This feature is particularly useful in
applications where the output voltage varies during operation (e.g.
battery chargers). Due to its high−voltage technology, the IC is
directly connected to the high−voltage DC rail. As a result, the
short−circuit trip point is not dependent upon any VCC auxiliary level.
The transformer core reset detection is done through an auxiliary
winding which, brought via a dedicated pin, also enables fast
Overvoltage Protection (OVP). Once an OVP has been detected, the
IC permanently latches off.
Finally, the continuous feedback signal monitoring implemented
with an overcurrent fault protection circuitry (OCP) makes the final
design rugged and reliable.
Features
• Free−Running Borderline/Critical Mode Quasi−Resonant Operation
• Current−Mode with Adjustable Skip−Cycle Capability
• No Auxiliary Winding VCC Operation
• Auto−Recovery Overcurrent Protection
• Latching Overvoltage Protection
• External Latch Triggering, e.g. Via Overtemperature Signal
• 500 mA Peak Current Source/Sink Capability
• Undervoltage Lockout for VCC Below 10 V
• Internal 1.0 ms Soft−Start
• Internal 8.0 ms Minimum TOFF
• Adjustable Skip Level
• Internal Temperature Shutdown
• Direct Optocoupler Connection
• SPICE Models Available for TRANsient Analysis
• Pb−Free Package is Available
Typical Applications
• AC/DC Adapters for Notebooks, etc.
• Offline Battery Chargers
• Consumer Electronics (DVD Players, Set−Top Boxes, TVs, etc.)
• Auxiliary Power Supplies (USB, Appliances, TVs, etc.)
http://onsemi.com
8
1
8
1
SO−8
D1, D2 SUFFIX
CASE 751
MARKING
DIAGRAMS
8
1207A
ALYW
1
PDIP−8
N SUFFIX
CASE 626
8
1
1207AP
AWL
YYWW
1207A/P = Device Code
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
PIN CONNECTIONS
Dmg 1
FB 2
CS 3
Gnd 4
8 HV
7 NC
6 VCC
5 Drv
(Top View)
ORDERING INFORMATION
Device
Package
Shipping†
NCP1207ADR2 SOIC−8 2500/Tape & Reel
NCP1207ADR2G
NCP1207AP
SOIC−8
(Pb−Free)
PDIP−8
2500/Tape & Reel
50 Units/Tube
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2004
August, 2004 − Rev. 0
1
Publication Order Number:
NCP1207A/D
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
www.DataSheet.co.kr
NCP1207A
1.6
1.4
1.2
1.0
0.8
0.6
0.4
−25
0
25 50 75 100 125
TEMPERATURE (°C)
Figure 3. Internal IC Consumption (No Output
Load) versus Temperature
2.3
2.1
1.9
1.7
1.5
1.3
1.1
−25
0
25 50 75 100 125
TEMPERATURE (°C)
Figure 4. Internal IC Consumption (1.0 nF
Output Load) versus Temperature
13.2
12.8
12.4
12.0
11.6
11.2
10.8
10.4
−25
0
25 50 75 100 125
TEMPERATURE (°C)
Figure 5. VCC Increasing Level at which the
Current Source Turns−Off versus Temperature
11.2
10.8
10.4
10
9.6
9.2
8.8
−25
0
25 50 75 100 125
TEMPERATURE (°C)
Figure 6. VCC Decreasing Level at which the
Current Source Turns−On versus Temperature
12
11
10
9
8
7
6
5
4
3
2
−25
0
25 50 75 100 125
TEMPERATURE (°C)
Figure 7. Internal Startup Current Source at
VCC = 10 V versus Temperature
40
35
30
25
20
15
10
5
0
−25
0
25 50 75 100 125
TEMPERATURE (°C)
Figure 8. Source and Sink Resistance versus
Temperature
http://onsemi.com
5
Datasheet pdf - http://www.DataSheet4U.net/
5 Page 
www.DataSheet.co.kr
NCP1207A
Latching Off the NCP1207A
In certain cases, it can be very convenient to externally
shut down permanently the NCP1207A via a dedicated
signal, e.g. coming from a temperature sensor. The reset
occurs when the user unplugs the power supply from the
mains outlet. To trigger the latchoff, a CTN (Figure 21) or
a simple NPN transistor (Figure 22) can do the work.
CTN
NCP1207A
18
27
36
45
Aux
Figure 21. A simple CTN triggers the latchoff as
soon as the temperature exceeds a given setpoint
ON/OFF
NCP1207A
Aux
18
27
36
45
Figure 22. A simple transistor arrangement allows
to trigger the latchoff by an external signal
Shutting Off the NCP1207A
Shutdown can easily be implemented through a simple
NPN bipolar transistor as depicted by Figure 23. When OFF,
Q1 is transparent to the operation. When forward biased, the
transistor pulls the FB pin to ground (VCE(sat) ≈ 200 mV) and
permanently disables the IC. A small time constant on the
transistor base will avoid false triggering (Figure 23).
NCP1207A
ON/OFF
10 k
3
Q1
2
10 nF
1
2
1
3
4
8
7
6
5
Figure 23. A simple bipolar transistor totally
disables the IC
Power Dissipation
The NCP1207A is directly supplied from the DC rail
through the internal DSS circuitry. The DSS being an
auto−adaptive circuit (e.g. the ON/OFF duty−cycle adjusts
itself depending on the current demand), the current flowing
through the DSS is therefore the direct image of the
NCP1207A current consumption. The total power
dissipation can be evaluated using:
(VHVDC * 11 V) @ ICC2. If we operate the device on a 250
Vac rail, the maximum rectified voltage can go up to 350
Vdc. As a result, the worse case dissipation occurs at the
maximum switching frequency and the highest line. The
dissipation is actually given by the internal consumption of
the NCP1207A when driving the selected MOSFET. The
best method to evaluate this total consumption is probably
to run the final circuit from a 50 Vdc source applied to pin 8
and measure the average current flowing into this pin.
Suppose that we find 2.0 mA, meaning that the DSS
duty−cycle will be 2.0/7.0 = 28.6%.
From the 350 Vdc rail, the part will dissipate:
350 V @ 2.0 mA + 700 mW (however this 2.0 mA number
will drop at higher operating junction temperatures).
A DIP8 package offers a junction−to−ambient thermal
resistance RqJA of 100°C/W. The maximum power
dissipation can thus be computed knowing the maximum
operating ambient temperature (e.g. 70°C) together with
the maximum allowable junction temperature (125°C):
P
max
+
Tjmax * TAmax
RqJA
t
550
mW.
As
we
can
see,
we
do not reach the worse consumption budget imposed by the
operating conditions. Several solutions exist to cure this
trouble:
• The first one consists in adding some copper area around
the NCP1207A DIP8 footprint. By adding a min pad area
of 80 mm2 of 35 mm copper (1 oz.), RqJA drops to about
75°C/W. Maximum power then grows up to 730 mW.
• A resistor Rdrop needs to be inserted with pin 8 to a) avoid
negative spikes at turn−off (see below)
b) split the power budget between this resistor and the
package. The resistor is calculated by leaving at least 50 V
on pin 8 at minimum input voltage (suppose 100 Vdc in
our
case):
Rdrop
v
Vbulkmin *
7.0 mA
50
V
t
7.1
kW.
The
power dissipated by the resistor is thus:
Pdrop + VdropRMS2ńRdrop
ǒ ǓIDSS @ Rdrop @ ǸDSSduty * cycle 2
+ Rdrop
ǒ7.0 mA @ 7.1 kW @ Ǹ0.286Ǔ2
+ 7.1 kW + 99.5 mW
Please refer to the application note AND8069 available
from www.onsemi.com/pub/ncp1200.
http://onsemi.com
11
Datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet 1207A.PDF ] | |
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