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부품번호 NVT2002 기능
기능 (NVT2001 / NVT2002) Bidirectional voltage level translator
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NVT2002 데이터시트, 핀배열, 회로
www.DataSheet.co.kr
NVT2001; NVT2002
Bidirectional voltage level translator for open-drain and
push-pull applications
Rev. 2 — 26 October 2011
Product data sheet
1. General description
The NVT2001/02 are bidirectional voltage level translators operational from 1.0 V to 3.6 V
(Vref(A)) and 1.8 V to 5.5 V (Vref(B)), which allow bidirectional voltage translations between
1.0 V and 5 V without the need for a direction pin in open-drain or push-pull applications.
Bit widths ranging from 1-bit or 2-bit are offered for level translation application with
transmission speeds < 33 MHz for an open-drain system with a 50 pF capacitance and a
pull-up of 197 .
When the An or Bn port is LOW, the clamp is in the ON-state and a low resistance
connection exists between the An and Bn ports. The low ON-state resistance (Ron) of the
switch allows connections to be made with minimal propagation delay. Assuming the
higher voltage is on the Bn port when the Bn port is HIGH, the voltage on the An port is
limited to the voltage set by VREFA. When the An port is HIGH, the Bn port is pulled to the
drain pull-up supply voltage (Vpu(D)) by the pull-up resistors. This functionality allows a
seamless translation between higher and lower voltages selected by the user without the
need for directional control.
When EN is HIGH, the translator switch is on, and the An I/O are connected to the Bn I/O,
respectively, allowing bidirectional data flow between ports. When EN is LOW, the
translator switch is off, and a high-impedance state exists between ports. The EN input
circuit is designed to be supplied by Vref(B). To ensure the high-impedance state during
power-up or power-down, EN must be LOW.
All channels have the same electrical characteristics and there is minimal deviation from
one output to another in voltage or propagation delay. This is a benefit over discrete
transistor voltage translation solutions, since the fabrication of the switch is symmetrical.
The translator provides excellent ESD protection to lower voltage devices, and at the
same time protects less ESD-resistant devices.
2. Features and benefits
Provides bidirectional voltage translation with no direction pin
Less than 1.5 ns maximum propagation delay
Allows voltage level translation between:
1.0 V Vref(A) and 1.8 V, 2.5 V, 3.3 V or 5 V Vref(B)
1.2 V Vref(A) and 1.8 V, 2.5 V, 3.3 V or 5 V Vref(B)
1.8 V Vref(A) and 3.3 V or 5 V Vref(B)
2.5 V Vref(A) and 5 V Vref(B)
3.3 V Vref(A) and 5 V Vref(B)
Datasheet pdf - http://www.DataSheet4U.net/




NVT2002 pdf, 반도체, 판매, 대치품
www.DataSheet.co.kr
NXP Semiconductors
NVT2001; NVT2002
Bidirectional voltage level translator
5.2 Pin description
Table 2.
Symbol
GND
VREFA
A1
A2
B1
B2
VREFB
EN
Pin description
Pin
NVT2001[1] NVT2002[2]
11
22
33
-4
46
-5
57
68
Description
ground (0 V)
low-voltage side reference supply voltage for An
low-voltage side; connect to VREFA through a pull-up
resistor
high-voltage side; connect to VREFB through a pull-up
resistor
high-voltage side reference supply voltage for Bn
switch enable input; connect to VREFB and pull-up
through a high resistor
[1] 1-bit NVT2001 available in XSON6 package.
[2] 2-bit NVT2002 available in TSSOP8, XSON8U, XSON8 packages.
6. Functional description
Refer to Figure 1 “Logic diagram of NVT2001; NVT2002 (positive logic)”.
6.1 Function table
Table 3. Function selection (example)
H = HIGH level; L = LOW level.
Input EN[1] Function
H An = Bn
L disconnect
[1] EN is controlled by the Vref(B) logic levels and should be at least 1 V higher than Vref(A) for best translator
operation.
NVT2001_NVT2002
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 26 October 2011
© NXP B.V. 2011. All rights reserved.
4 of 23
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NVT2002 전자부품, 판매, 대치품
www.DataSheet.co.kr
NXP Semiconductors
NVT2001; NVT2002
Bidirectional voltage level translator
7.2 Bidirectional translation
For the bidirectional clamping configuration (higher voltage to lower voltage or lower
voltage to higher voltage), the EN input must be connected to VREFB and both pins pulled
to HIGH side Vpu(D) through a pull-up resistor (typically 200 k). This allows VREFB to
regulate the EN input. A filter capacitor on VREFB is recommended. The master output
driver can be totem pole or open-drain (pull-up resistors may be required) and the slave
device output can be totem pole or open-drain (pull-up resistors are required to pull the Bn
outputs to Vpu(D)). However, if either output is totem-pole, data must be unidirectional or
the outputs must be 3-stateable and be controlled by some direction-control mechanism
to prevent HIGH-to-LOW contentions in either direction. If both outputs are open-drain, no
direction control is needed.
The reference supply voltage (Vref(A)) is connected to the processor core power supply
voltage. When VREFB is connected through a 200 kresistor to a 3.3 V to 5.5 V Vpu(D)
power supply, and Vref(A) is set between 1.0 V and (Vpu(D) 1 V), the output of each An
has a maximum output voltage equal to VREFA, and the output of each Bn has a
maximum output voltage equal to Vpu(D).
7.3 Sizing pull-up resistor
The pull-up resistor value needs to limit the current through the pass transistor when it is
in the ON state to about 15 mA. This ensures a pass voltage of 260 mV to 350 mV. If the
current through the pass transistor is higher than 15 mA, the pass voltage also is higher in
the ON state. To set the current through each pass transistor at 15 mA, the pull-up resistor
value is calculated as:
RPU
=
-V---p---u----D-----------0----.-3---5-----V--
0.015 A
Table 5 summarizes resistor reference voltages and currents at 15 mA, 10 mA, and 3 mA.
The resistor values shown in the +10 % column or a larger value should be used to
ensure that the pass voltage of the transistor would be 350 mV or less. The external driver
must be able to sink the total current from the resistors on both sides of the NVT20xx
device at 0.175 V, although the 15 mA only applies to current flowing through the
NVT20xx device.
Table 5. Pull-up resistor values
Calculated for VOL = 0.35 V; assumes output driver VOL = 0.175 V at stated current.
Vpu(D)
Pull-up resistor value ()
64 mA
32 mA
15 mA
10 mA
Nominal +10 %[1] Nominal +10 %[1] Nominal +10 %[1] Nominal +10 %[1]
5 V 310 341 465 512
3.3 V
197 217 295 325
2.5 V
143 158 215 237
1.8 V
97 106 145 160
1.5 V
77 85 115 127
1.2 V
57 63 85 94
3 mA
Nominal +10 %[1]
1550
1705
983 1082
717 788
483 532
383 422
283 312
[1] +10 % to compensate for VCC range and resistor tolerance.
NVT2001_NVT2002
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 26 October 2011
© NXP B.V. 2011. All rights reserved.
7 of 23
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