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PDF MC33784 Data sheet ( Hoja de datos )
| Número de pieza | MC33784 | |
| Descripción | DSI 2.02 Sensor Interface | |
| Fabricantes | Freescale Semiconductor | |
| Logotipo |  |
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Freescale Semiconductor
Advance Information
DSI 2.02 Sensor Interface
The 33784 is a slave, Distributed System Interface Bus (DBUS),
version 2.02 compatible device, optimized as a sensor interface. The
device contains circuits to power sensors such as accelerometers,
and to digitize the analog level from the sensor. The device is
controlled by commands over the bus, and returns measured data
and other information over the bus.
Features
• DSI version 2.02 compatible
• 2-channel, 10-bit analog-to-digital converter (ADC)
• 3 pins configurable as logic inputs or outputs
• Provides regulated +5.0v output for sensor power from bus
• On-board clock (no external elements required)
• Includes bus switches on bus and bus return
• Pb-free packaging designated by suffix code EF
Document Number: MC33784
Rev 3.0, 11/2009
33784
SENSOR INTERFACE
EF SUFFIX (PB-FREE)
98ASB42566B
16-LEAD SOICN
ORDERING INFORMATION
Device
MCZ33784EF/R2
Temperature
Range (TA)
-40°C to 125°C
Package
16 SOICN
33781
BUS
33784
REGOUT
RTNIN
AGND
AN0
AN1
I/O0
I/O1
I/O2
BUSOUT
RTNOUT
BUSIN
H_CAP
IDDQ
TEST1
TOUT
VCC XY
ACCELEROMETER
TEST2
33784
BUSIN
RTNIN
BUSOUT
RTNOUT
AGND
Figure 1. 33784 Simplified Application Diagram
(Daisy Chain Shown)
To other
33784
Slaves
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2008 - 2009. All rights reserved.
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ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics
Characteristics noted under conditions -0.3V ≤ VBUSIN ≤ 30V, 6.0V ≤ VH_CAP ≤ 30V, -40°C ≤ TA ≤ 125°C,
RTNIN=AGND = 0V, unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under
nominal conditions, unless otherwise noted.
Characteristic
Symbol Min Typ Max Unit
Internal Quiescent Current Drain
VH_CAP = 25V, I/O = Input
BUSIN to H_CAP Rectifier Voltage Drop
IHCAP = 15mA
IHCAP = 100mA
H_CAP Diode Efficiency(4)
IHCAP = 400mA, BUSIN = 25V
IQ
VRECT
mA
– – 4.0
V
– 0.75 1.00
– 0.9 1.4
99 –
%
–
BUSIN Bias Current
VBUSIN = 8.0V, VH_CAP = 9.0V
VBUSIN = 4.5V, VH_CAP = 9.0V when device is not signalling
Rectifier Leakage Current
VBUSIN = 0V, VH_CAP = 25V
REGOUT
5.8V < VH_CAP ≤ 25V, 0 ≤ IRO ≤ 14mA
REGOUT Line Regulation
IRO = 14mA, 6.0V ≤ VH CAP ≤ 25V
IRO is the total internal and external load current
REGOUT Load Regulation
0 ≤ IRO ≤ 14mA, 6.0V ≤ VH CAP ≤ 25V,
IBIAS
IRLKG
-100
-100
-20
–
–
μA
100
100
20 μA
VRO
4.9 5.0 5.1
V
VRLINE
–
– 20 mV
VRLD – – 15 mV
REGOUT Transient Line Regulation(5)
IRO = 14mA, 0 V ≤ VBUSIN ≤ 30 V, 8V/us @ BUSIN, or, 5V/us @
HCAP
CRO = 2.2 uF, CRO ESR = 0.063-2.2Ω @ 20kHz,
0.004-0.072Ω @ 200kHz
– – (25) mV
REGOUT Transient Load Regulation(5)
0 ≤ IRO ≤ 14mA, 6.0V ≤ VH CAP ≤ 25V, 2mA/us @ IRO,
CRO = 2.2uF, CRO ESR = 0.063-2.2Ω @ 20kHz,
0.004-0.072Ω @ 200kHz
REGOUT Current Limit, VREGOUT = 0V
Hi-side Bus Switch Resistance
0 ≤ VBUSIN ≤ 30V, ISWH = 160mA (Bus Switch Active)
Low-side Bus Switch Resistance
ISWL = 160mA (Bus Switch Active)
– – (50) mV
ILMT
RSWH
RSWL
25 35 45 mA
Ω
– 3.0 6.0
Ω
– 3.0 6.0
Notes
4. EFF = 400mA/IBUSIN - IQ
5. Assured by design.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33784
5
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FUNCTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
MC33784 - Functional Diagram
Supply Voltage
Rectifier
5.0V Regulator
Under-voltage Detector
Sensing & Control
Receiver
Control Logic
Clock
Analog to Digital Converter
Bus Switches
Power Stage
Transmitter
Supply Voltage Sensing & Control
Power Stage
Bus switches
Functional Internal Block Diagram
SUPPLY VOLTAGE
RECTIFIER
There is an on-chip rectifier, which allows power and
communications to be delivered to the 33784 over the bus.
The rectifier lies between BUSIN and H_CAP. During the idle
state of the bus, the rectifier allows the bus to charge an
external storage capacitor attached to H_CAP. During
signaling, the rectifier isolates H_CAP from the bus to prevent
the bus from draining the external capacitor while signaling.
The capacitor then supplies power to the 33784 during
signaling. The signaling time and the size of the external
capacitor must be selected so that the voltage on HCAP does
not drop below 6.77V during signaling.
5.0V REGULATOR
An on-chip 5V regulator supplies internal power for the
33784 and also supplies power to external devices, such as
accelerometers via the REGOUT pin. A bypass capacitor is
required on the REGOUT pin to keep the regulator stable. All
current supplied by the regulator is derived from the external
capacitor attached to H_CAP.
UNDER-VOLTAGE DETECTOR
The under-voltage detector issues a power-ON reset
(POR) signal during power-up and power-down of the 33784.
It also monitors the voltage on HCAP and REGOUT and
issues a reset when either of these pins fall below their
respective POR thresholds. The reset signal is filtered to
prevent glitches on HCAP or REGOUT from causing an
erroneous reset. Any time the 33784 is reset, the device will
need to be re-initialized before it will respond to further
commands.
LOGIC AND CONTROL
RECEIVER
The receiver detects the voltage on BUSIN and senses
when the bus is idle and when it is signaling. Communication
on the bus always begins when the voltage on BUSIN drops
below the frame threshold. This change from idle mode to
signal mode is sensed by the receiver and is interpreted as
the start of an incoming word.
The first bit in the word begins when the bus voltage drops
below the Signal threshold. This starts a counter in a serial
decoder, which essentially measures the amount of time that
the bus voltage is below the signal threshold. When the bus
Analog Integrated Circuit Device Data
Freescale Semiconductor
33784
11
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