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W682510 데이터시트 PDF




Nuvoton Technology에서 제조한 전자 부품 W682510은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 W682510 기능
기능 (W682510 / W682310) Dual-Channel Voiceband Codecs
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로고 Nuvoton Technology 로고


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W682510 데이터시트, 핀배열, 회로
W682510/W682310
W682510/ W682310
DUAL-CHANNEL
VOICEBAND CODECS
www.DataSheet.co.kr
Datasheet
Revision A11
Datasheet pdf - http://www.DataSheet4U.net/




W682510 pdf, 반도체, 판매, 대치품
W682510/W682310
4. TABLE OF CONTENTS
1. GENERAL DESCRIPTION.................................................................................................................. 2 
2. FEATURES ......................................................................................................................................... 2 
3. BLOCK DIAGRAM .............................................................................................................................. 3 
4. TABLE OF CONTENTS ...................................................................................................................... 4 
5. PIN CONFIGURATION ....................................................................................................................... 6 
6. PIN DESCRIPTION............................................................................................................................. 7 
7. FUNCTIONAL DESCRIPTION............................................................................................................ 9 
7.1. Transmit Path ............................................................................................................................... 9 
7.1.1. AI1, AI2, AO1-, AO2-............................................................................................................ 10 
7.1.2. PCMT1 ................................................................................................................................. 11 
7.1.3. PCMT2 ................................................................................................................................. 11 
7.2. Receive Path .............................................................................................................................. 11 
7.2.1. RO1, RO2 ............................................................................................................................ 11 
7.2.2. PCMR1................................................................................................................................. 12 
7.2.3. PCMR2................................................................................................................................. 12 
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7.3. Power Signals............................................................................................................................. 12 
7.3.1. VDD........................................................................................................................................ 12 
7.3.2. VSSA ...................................................................................................................................... 12 
7.3.3. VSSD ...................................................................................................................................... 12 
7.3.4. VREF ...................................................................................................................................... 13 
7.3.5. PUI ....................................................................................................................................... 13 
7.4. PCM Interface............................................................................................................................. 13 
7.4.1. μ/A-Law ................................................................................................................................ 13 
7.4.2. BCLK .................................................................................................................................... 13 
7.4.3. FSR ...................................................................................................................................... 14 
7.4.4. FST....................................................................................................................................... 14 
7.4.5. PCMMS ................................................................................................................................ 14 
7.5. Power State Modes .................................................................................................................... 14 
7.5.1. Power Save Mode................................................................................................................ 14 
7.5.2. Power Down Mode............................................................................................................... 14 
7.5.3. Power Save/Down Output pin state ..................................................................................... 15 
Publication Release Date: January 2009
- 4 - Revision A11
Datasheet pdf - http://www.DataSheet4U.net/

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W682510 전자부품, 판매, 대치품
W682510/W682310
6. PIN DESCRIPTION
Pin
Name
VREF
Pin #
SSOP
1
Pin #
SOP
1
Functionality
(CH1 = Channel 1, CH2 = Channel 2)
This pin is used to bypass the signal ground. It needs to be decoupled to VSS
through a 0.1 μF ceramic decoupling capacitor. No external loads should be
tied to this pin.
RO2
2
2
CH2 Non-Inverting output of the receive smoothing filter. This pin can typically
drive a 600 Ω load (W682510) or 1200 Ω load (W682310).
RO1
3
4
CH1 Non-Inverting output of the receive smoothing filter. This pin can typically
drive a 600 Ω load (W682510) or 1200 Ω load (W682310)..
PUI 4
PCMMS
5
5
Power up input signal. When this pin is HIGH (tied to VDD) the part is powered
up. When LOW (tied to VSS) the part is powered down.
6
PCM mode select input (serial or parallel data interface) HIGH = Parallel, LOW
= Serial
VDD
6
8
Power supply. This pin should be decoupled to VSS with a 0.1μF ceramic
capacitor.
VSSD
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7 9 This is the digital supply ground. This pin should be connected to 0V.
FSR
8
10
8 kHz Frame Sync input for the PCM receive section. It can also be connected
to the FST pin when transmit and receive are synchronous operations.
PCMR2
9
11
CH2 PCM input data receive pin. The data needs to be synchronous with the
FSR and BCLK pins.
PCMR1
10
12
CH1 PCM input data receive pin. The data needs to be synchronous with the
FSR and BCLK pins.
PCMT1
11
13
CH1 PCM output data transmit pin. The output data is synchronous with the
FST and BCLK pins.
PCMT2
12
14
CH2 PCM output data transmit pin. The output data is synchronous with the
FST and BCLK pins.
FST 13 15 8 kHz transmit frame sync input. This pin synchronizes the transmit data bytes.
BCLK
14 16 PCM transmit and receive bit clock input pin for CH1 and CH2 transmit.
-7-
Publication Release Date: January 2009
Revision A11
Datasheet pdf - http://www.DataSheet4U.net/

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관련 데이터시트

부품번호상세설명 및 기능제조사
W682510

DUAL-CHANNEL VOICEBAND CODECS

Winbond
Winbond
W682510

(W682510 / W682310) Dual-Channel Voiceband Codecs

Nuvoton Technology
Nuvoton Technology

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