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ISL26320 데이터시트 PDF




Intersil에서 제조한 전자 부품 ISL26320은 전자 산업 및 응용 분야에서
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부품번호 ISL26320 기능
기능 250kSPS Low-power ADCs
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ISL26320 데이터시트, 핀배열, 회로
12-bit, 250kSPS Low-power ADCs with Single-ended
and Differential Inputs and Multiple Input Channels
ISL26320, ISL26321, ISL26322,
ISL26323, ISL26324, ISL26325,
ISL26329
The ISL26320/21/22/23/24/25/29 family of sampling
SAR-type ADCs feature excellent linearity over supply and
temperature variations, and offer versions with 1-, 2-, 4- and
8-channel single-ended inputs, and 1-, 2- and 4-channel
differential inputs.
A proprietary input multiplexer and combination buffer amplifier
reduces the input drive requirements, resulting in lower cost and
reduced board space. Specified measurement accuracy is
maintained with input signals up to VDD.
Members of the ISL26320/21/22/23/24/25/29 family of
Low-Power ADCs offer pinout intercompatibility, differing only in
the analog inputs, to support quick replication of proven layouts
across multiple design platforms.
The serial digital interface is SPI compatible and is easily
interfaced to popular FPGAs and microcontrollers. Power
consumption is limited to 15mW at a sampling rate of 250kSPS,
and an operating current of just 8μA typical between
conversions, when configured for Auto Powerdown mode.
The ISL26320/21/22/23/24/25/29 feature up to 5kV Human
Body Model ESD survivability and are available in the popular
SOIC and TSSOP packages. Performance is specified for
operation over the full industrial temperature range (-40°C to
+125°C).
Features
• Pin-compatible Family Allows Easy Design Upgrades
• Excellent Differential Non-Linearity (0.7LSB max)
• Low THD: -86dB (typ)
• Simple SPI-compatible Serial Digital Interface
• Low 3mA Operating Current
• Power-down Current between Conversions 8μA (typ)
• +5.25V to +2.7V Supply
• Excellent ESD Survivability: 5kV HBM, 350V MM, 2kV CDM
Applications
• Industrial Process Control
• Energy Measurement
• Multichannel Data Acquisition Systems
• Pressure Sensors
• Flow Controllers
www.DataSheet.net/
June 8, 2012
FN8273.0
FIGURE 1. FUNCTIONAL BLOCK DIAGRAM
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2012. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners
Datasheet pdf - http://www.DataSheet4U.co.kr/




ISL26320 pdf, 반도체, 판매, 대치품
ISL26320, ISL26321, ISL26322, ISL26323, ISL26324, ISL26325, ISL26329
Pin Configurations
ISL26320
(8 LD SOIC)
TOP VIEW
ISL26321
(8 LD SOIC)
TOP VIEW
ISL26323
(8 LD SOIC)
TOP VIEW
ISL26322
(16 LD TSSOP)
TOP VIEW
ISL26324
(16 LD TSSOP)
TOP VIEW
www.DataSheet.net/
ISL26325
(16 LD TSSOP)
TOP VIEW
ISL26329
(16 LD TSSOP)
TOP VIEW
4 FN8273.0
June 8, 2012
Datasheet pdf - http://www.DataSheet4U.co.kr/

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ISL26320 전자부품, 판매, 대치품
ISL26320, ISL26321, ISL26322, ISL26323, ISL26324, ISL26325, ISL26329
Electrical Specifications VREF = VDD V, VDD = 2.7V to 5V, VCM = VDD/2, SCLK = 20MHz and TA = -40°C to +125°C (typical performance
at +25°C), unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued)
SYMBOL
PARAMETER
TEST LEVEL OR NOTES
MIN MAX
(Note 6)
TYP
(Note 6)
UNITS
Offset Error Matching
-2 2 LSB
PSRR Power Supply Rejection Ratio
70 dB
DYNAMIC PERFORMANCE
SNR
Signal-to-Noise
Notes: VIN = FS-0.1dB, fIN = 10kHz
Differential Inputs
Single-Ended Inputs
73.4
73.4
dB
dB
SINAD
Signal-to-Noise + Distortion
Notes: VIN = FS-0.1dB, fIN = 10kHz
Differential Inputs
Single-Ended Inputs
73.1
73.1
dB
dB
THD
Total Harmonic Distortion
Notes: VIN = FS-0.1dB, fIN = 10kHz
Differential Inputs
Single-Ended Inputs
-86 dB
-86 dB
SFDR
BW
Spurious-free Dynamic Range
Notes: VIN = FS-0.1dB
-3dB Input Bandwidth
fIN = 20kHz
96 dB
2.5 MHz
tAD Sampling Aperture Delay
tjit Sampling Aperture Jitter
POWER SUPPLY REQUIREMENTS
12 ns
25 ps
VDD Supply Voltage
IDD Supply Current
PD Power Consumption
Normal Operation
2.7
5.25
V
3 3.5 mA
15
17.5
mW
IPD Power-down Current
Auto Power-Down Mode
8 50 μA
Istby Standby Mode Current
DIGITAL INPUTS
Auto Sleep Mode
www.DataSheet.net/
0.4 mA
VIH
VIL
VOH
VOL
IIH, IIL
IOH = -1mA
IOL = 1mA
Input Leakage Current
Serial Clock Frequency
0.7 VDD
VDD-0.4
-100
0.2 VDD
0.2 VDD
100
20
V
V
V
V
nA
MHz
TIMING SPECIFICATIONS (Note 7)
tSCLK
tSCLK
tDATA
SCLK Period (in RAC Mode)
SCLK Period (in RSC, RDC Modes)
Safe Data Transfer Time After Conversion
State Begins
50 ns
50 100 ns
1.6 μs
tCSB_SCLK CSB Falling Low to SCLK Rising Edge
tSDI_SU SDI Setup Time with Respect to Positive
Edge of SCLK
40 ns
10 ns
tSDI_H SDI Hold Time with Respect to Positive
Edge of SCLK
10 ns
tSDO_V SDOUT Valid Time with Respect to
Negative Edge of SCLK
25 ns
tSDOZ_D SDOUT to High Impedance State After CNV Note 8
Rising Edge (or last SCLK falling edge)
85 ns
tACQ Acquisition Time when Fully Powered Up
400 ns
7 FN8273.0
June 8, 2012
Datasheet pdf - http://www.DataSheet4U.co.kr/

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