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AT24CS08 데이터시트 PDF




ATMEL Corporation에서 제조한 전자 부품 AT24CS08은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

PDF 형식의 AT24CS08 자료 제공

부품번호 AT24CS08 기능
기능 (AT24CS04 / AT24CS08) EEPROM
제조업체 ATMEL Corporation
로고 ATMEL Corporation 로고


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AT24CS08 데이터시트, 핀배열, 회로
Atmel AT24CS04 and AT24CS08
I2C-Compatible (2-wire) Serial EEPROM with a
Unique, Factory Programmed 128-bit Serial Number
4-Kbit (512 x 8), 8-Kbit (1024 x 8)
PRELIMINARY DATASHEET
Standard Features
Low-voltage operation
VCC = 1.7V to 5.5V
Internally organized as 512 x 8 (4-Kbit) or 1024 x 8 (8-Kbit)
I2C-compatible (2-wire) serial interface
Schmitt Trigger, filtered inputs for noise suppression
Bidirectional data transfer protocol
400kHz (1.7V) and 1MHz (2.5V, 2.7, 5.0V) compatibility
Write Protect pin for hardware data protection
16-byte page write mode
Partial page writes allowed
Self-timed write cycle (5ms max)
High-reliability
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Endurance: 1,000,000 write cycles
Data retention: 100 years
Green package options (Pb/Halide-free/RoHS-compliant)
8-lead JEDEC SOIC, 8-lead TSSOP, 8-pad UDFN, and 5-lead SOT23
Die sale options: wafer form and tape and reel available
Enhanced Features in the CS Serial EEPROM Series
All standard features supported
128-bit unique factory-programmed serial number
Permanently locked, read-only value
Stored in a separate memory area
Guaranteed unique across entire CS Series of Serial EEPROMs
8766A–SEEPR–6/12
Datasheet pdf - http://www.DataSheet4U.co.kr/




AT24CS08 pdf, 반도체, 판매, 대치품
5. Pin Description
Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge
clock data out of each device.
Serial Data (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be
wire-ORed with any number of other open-drain or open-collector devices.
Device Addresses (A2, A1): The AT24CS04 uses the A2 and A1 inputs for hard wire addressing allowing a total of four
4-Kbit devices to be addressed on a single bus system. Pin 1 is a no connect and can be connected to ground.
The AT24CS08 only uses the A2 input for hardware addressing and a total of two 8K devices may be addressed on a
single bus system. Pins 1 and 2 are no connects and can be connected to ground. Refer to Section 8. “Device
Addressing” on page 10 for details about the pin state and the required protocol for communication .
The device address pins are not available on the SOT23 package offering. Refer to Section 8. “Device Addressing” on
page 10 for details on the protocol requirements with this package.
Write Protect (WP): AT24CS04/08 has a Write Protect (WP) pin that provides hardware data protection. When the Write
Protect pin is connected to ground (GND), normal read/write operations to the full array are possible. When the Write
Protect pin is connected to VCC, all write operations to the memory are inhibited but read operations are still possible.
This operation is summarized in Table 5-1 below.
Table 5-1. Write Protect
WP Pin
Status
At VCC
At GND
Part of the Array Protected
Atmel AT24CS04/08
Full Array
Normal Read/Write Operations
www.DataSheet.net/
Atmel AT24CS04/08 [PRELIMINARY DATASHEET]
8766A–SEEPR–6/12
4
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AT24CS08 전자부품, 판매, 대치품
7. Device Operation
Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may
change only during SCL low time periods (see Figure 7-4 on page 9). Data changes during SCL high periods will indicate
a Start or Stop condition as defined below.
Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must precede any other
command (see Figure 7-5 on page 9).
Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the Stop
command will place the EEPROM in a standby power mode (see Figure 7-5 on page 9).
Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The
EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle.
Standby Mode: The AT24CS04/08 features a low-power standby mode which is enabled upon power-up as well as after
the receipt of the Stop bit and the completion of any internal operations.
2-wire Software Reset: After an interruption in protocol, power loss, or system reset, any 2-wire part can be reset by
following these steps:
1. Create a start bit condition.
2. Clock nine cycles.
3. Create another start bit followed by stop bit condition as shown in Figure 7-1.
The device is ready for next communication after above steps have been completed.
Figure 7-1. Software reset
Dummy Clock Cycles
SCL
123
89
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Start
Bit
Start
Bit
Stop
Bit
SDA
Atmel AT24CS04/08 [PRELIMINARY DATASHEET]
8766A–SEEPR–6/12
7
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