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92HD95 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 92HD95
기능 FOUR CHANNEL HD AUDIO CODEC
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92HD95 데이터시트, 핀배열, 회로
DATASHEET
FOUR CHANNEL HD AUDIO CODEC
OPTIMIZED FOR LOW POWER/LOW COST
DESCRIPTION
The 92HD95 is a low power optimized, high fidelity,
4-channel audio codec compatible with Intel’s High Defini-
tion (HD) Audio Interface. The 92HD95 provides high qual-
ity, HD Audio capability to notebook and desktop PC
applications.
FEATURES
• 4 Channel (2 stereo DACs, 2 stereo ADCs) with
24-bit resolution
• Microsoft WLP premium logo compliant
• 2W(4ohm)/1W(8ohm) Class-D Stereo BTL Amplifier
at <1% THD+N and 5V
• Selectable frequency hardware high-pass filter for
speaker protection.
• 10 band hardware parametric equalizer (5 bands per
channel) for speaker optimization in ALL operating
scenarios
• Hardware compressor limiter allows higher average
volume level without resonances or damage to
speakers.
• Integrated Class-G true capless stereo headphone
amplifier with charge pump/LDO
• 4 analog ports with port presence detect (3 single
ended, 1 BTL)
• Combo Jack Support allowing for dual-function
headphone and headset detection
• 2 Voltage adjustable VREF_Out pins for
microphone bias
• 2 Digital microphone inputs (4 mic support)
• Microphone Mute Input
• Selectable 1.5V and 3.3V HDA signaling
• Internal DVDD LDO voltage regulator
• Supports Runtime D3 (RTD3) low power mode
• Capable of MSLync Compliance
• Full HDA015-B and EuP low power support
• Audio inactivity transitions codec from D0 to D3 low
power mode
• Resume from D3 to D0 with audio activity in < 10 msec
• D3 to D0 transition with < -65dB pop/click
• Port presence detect in D3 with or without bit clock
• PC beep wake up in D3
• Additional vendor specific modes for even lower power
• 3.3 V analog power supply
• Digital and Analog PC Beep to all outputs
• 40-pin 5mm x 5mm QFN RoHS package
92HD95
SOFTWARE SUPPORT
• Intuitive IDT HD Sound graphical user interface
that allows configurability and preference settings
• Output Path Processing
• 12 band fully parametric equalizer
• Compressor/limiter allows higher average volume level
without resonances or damage to speakers.
• Enables improved voice articulation
• Constant, system-level effects tuned to optimize a
particular platform can be combined with user-mode
“presets” tailored for specific acoustical environments
and applications
• System-level effects automatically disabled when
external audio connections made
• Input Path Processing
• 2 band fully parametric equalizer to allow for shaping of
microphone response
• Compressor/limiter allows higher average volume level
• Available near-field and far-field voice capture
algorithms to support conference room/lecture hall
applications
• Microphone Beam Forming, Acoustic Echo
Cancellation, and Noise Suppression
• IDT APO wrapper
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Enables multiple APOs to be used with the IDT Driver
• Dynamic Stream Switching
• Improved multi-streaming (Real Time Communication)
user experience with less support calls
• Broad 3rd party branded software including
Creative, Dolby, DTS, Waves, Sonic Focus & SRS
40 39 38 37 36 35 34 33 32 31
DVDD_LV 1
30 AVDD2
DMIC_CLK/GPIO 1 2
DMIC_0/GPIO 2 3
DMIC_1/GPIO 0 4
Digital Mic
Interface
BTL BTL
Digital PWM controller
Stereo 5-band EQ
Highpass Filter
29 CPVreg
28 FCap1
27 FCap2
SDATA_OUT 5
BITCLK 6
DVDDIO 7
SDATA_IN 8
DVDD 9
SYNC 10
Stereo
DAC 0
Stereo
DAC 1
Stereo
ADC0
Stereo
ADC1
DAC0
DAC1
DMIC0
DMIC1
DAC0
DAC1
DMIC0
DMIC1
DAC0
DAC1
MUX
DAC0
DAC1
MUX
26 VNeg
25 VPos
HP 24 PORTA_R
HP 23 PORTA_L
22 AVDD1
21 CAP2
11 12 13 14 15 16 17 18 19 20
©2012 INTEGRATED DEVICE TECHNOLOGY, INC.
1
V 0.91 06/12
92HD95
Datasheet pdf - http://www.DataSheet4U.co.kr/




92HD95 pdf, 반도체, 판매, 대치품
92HD95
Four Channel HD Audio Codec
7.7. PortC (NID = 0Ch): WCap ...............................................................................................................98
7.7.1. PortC (NID = 0Ch): PinCap ................................................................................................99
7.7.2. PortC (NID = 0Ch): InAmpLeft .........................................................................................100
7.7.3. PortC (NID = 0Ch): InAmpRight .......................................................................................101
7.7.4. PortC (NID = 0Ch): PwrState ...........................................................................................101
7.7.5. PortC (NID = 0Ch): PinWCntrl .........................................................................................102
7.7.6. PortC (NID = 0Ch): UnsolResp ........................................................................................103
7.7.7. PortC (NID = 0Ch): ChSense ...........................................................................................103
7.7.8. PortC (NID = 0Ch): EAPDBTLLR .....................................................................................104
7.7.9. PortC (NID = 0Ch): ConfigDefault ....................................................................................104
7.8. PortD (NID = 0Dh): WCap .............................................................................................................107
7.8.1. PortD (NID = 0Dh): PinCap ..............................................................................................108
7.8.2. PortD (NID = 0Dh): ConLst ..............................................................................................109
7.8.3. PortD (NID = 0Dh): ConLstEntry0 ....................................................................................110
7.8.4. PortD (NID = 0Dh): ConSelectCtrl ...................................................................................110
7.8.5. PortD (NID = 0Dh): PwrState ...........................................................................................111
7.8.6. PortD (NID = 0Dh): PinWCntrl .........................................................................................112
7.8.7. PortD (NID = 0Dh): EAPDBTLLR .....................................................................................112
7.8.8. PortD (NID = 0Dh): EsdRest ............................................................................................113
7.8.9. PortD (NID = 0Dh): ConfigDefault ....................................................................................113
7.9. DMic0 (NID = 0Eh): WCap .............................................................................................................116
7.9.1. DMic0 (NID = 0Eh): PinCap .............................................................................................117
7.9.2. DMic0 (NID = 0Eh): InAmpLeft ........................................................................................118
7.9.3. DMic0 (NID = 0Eh): InAmpRight ......................................................................................119
7.9.4. DMic0 (NID = 0Eh): PwrState ..........................................................................................119
7.9.5. DMic0 (NID = 0Eh): PinWCntrl .........................................................................................120
7.9.6. DMic0 (NID = 0Eh): ConfigDefault ...................................................................................121
7.10. DMic1 (NID = 0Fh): WCap ...........................................................................................................123
7.10.1. DMic1 (NID = 0Fh): PinCap ...........................................................................................125
7.10.2. DMic1 (NID = 0Fh): InAmpLeft .......................................................................................126
7.10.3. DMic1 (NID = 0Fh): InAmpRight ...............www..Data.Sheet..net/.................................................................. 127
7.10.4. DMic1 (NID = 0Fh): PwrState ........................................................................................127
7.10.5. DMic1 (NID = 0Fh): PinWCntrl .......................................................................................128
7.10.6. DMic1 (NID = 0Fh): ConfigDefault .................................................................................128
7.11. DAC0 (NID = 10h): WCap ............................................................................................................131
7.11.1. DAC0 (NID = 10h): Cnvtr ...............................................................................................132
7.11.2. DAC0 (NID = 10h): OutAmpLeft .....................................................................................133
7.11.3. DAC0 (NID = 10h): OutAmpRight ..................................................................................134
7.11.4. DAC0 (NID = 10h): PwrState .........................................................................................134
7.11.5. DAC0 (NID = 10h): CnvtrID ............................................................................................135
7.11.6. DAC0 (NID = 10h): EAPDBTLLR ...................................................................................136
7.12. DAC1 (NID = 11h): WCap ............................................................................................................136
7.12.1. DAC1 (NID = 11h): Cnvtr ...............................................................................................138
7.12.2. DAC1 (NID = 11h): OutAmpLeft .....................................................................................139
7.12.3. DAC1 (NID = 11h): OutAmpRight ..................................................................................139
7.12.4. DAC1 (NID = 11h): PwrState .........................................................................................140
7.12.5. DAC1 (NID = 11h): CnvtrID ............................................................................................141
7.12.6. DAC1 (NID = 11h): EAPDBTLLR ...................................................................................141
7.13. ADC0 (NID = 12h): WCap ............................................................................................................142
7.13.1. ADC0 (NID = 12h): ConLst ............................................................................................143
7.13.2. ADC0 (NID = 15h): ConLstEntry0 ..................................................................................144
7.13.3. ADC0 (NID = 15h): Cnvtr ...............................................................................................144
7.13.4. ADC0 (NID = 12h): ProcState ........................................................................................145
7.13.5. ADC0 (NID = 12h): PwrState .........................................................................................146
7.13.6. ADC0 (NID = 12h): CnvtrID ............................................................................................147
7.14. ADC1 (NID = 13h): WCap ............................................................................................................147
7.14.1. ADC1 (NID = 13h): ConLst ............................................................................................149
7.14.2. ADC1 (NID = 13h): ConLstEntry0 ..................................................................................149
7.14.3. ADC1 (NID = 13h): Cnvtr ...............................................................................................150
IDT CONFIDENTIAL
©2012 INTEGRATED DEVICE TECHNOLOGY, INC.
4
V 0.91 06/12
92HD95
Datasheet pdf - http://www.DataSheet4U.co.kr/

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92HD95 전자부품, 판매, 대치품
92HD95
Four Channel HD Audio Codec
LIST OF FIGURES
Figure 1. Multi-channel capture ......................................................................................................................17
Figure 2. Multi-channel timing diagram ..........................................................................................................17
Figure 3. HP EAPD Example to be replaced by single pin for internal amp ..................................................21
Figure 4. EAPD implementation .....................................................................................................................21
Figure 5. Single Digital Microphone (data is ported to both left and right channels .......................................23
Figure 6. Stereo Digital Microphone Configuration ........................................................................................24
Figure 7. Quad Digital Microphone Configuration ..........................................................................................25
Figure 8. Analog PC Beep Active ..................................................................................................................26
Figure 9. Analog PC Beep Flow chart ............................................................................................................27
Figure 10. Combo Jack ..................................................................................................................................29
Figure 11. HD Audio Bus Timing ....................................................................................................................37
Figure 12. Functional Block Diagram .............................................................................................................39
Figure 13. Widget Diagram ............................................................................................................................40
Figure 14. Port Configurations .......................................................................................................................41
Figure 15. 40-QFN Pin Assignment .............................................................................................................208
Figure 16. 40-QFN Package Diagram ..........................................................................................................210
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IDT™ CONFIDENTIAL
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
7
V 0.91 06/12
92HD95
Datasheet pdf - http://www.DataSheet4U.co.kr/

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