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PDF STUSB06E Data sheet ( Hoja de datos )
| Número de pieza | STUSB06E | |
| Descripción | 3.3 V USB transceiver | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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STUSB06E
3.3 V USB transceiver
Features
■ Compliant to USB v2.0 for full-speed (12 Mb/s)
and low-speed (1.5 Mbps) operation
■ HBM = ± 9 kV on D+, D- lines, ± 7 kV on VREG
■ ± 6 kV ESD compliant to IEC-61000-4-2 on D+,
D-, VREG lines
■ Separate I/O supply with operation down to
1.6 V
■ Integrated 150 kΩ switchable pull-up from D+
to VREG
■ Supports host negotiation protocol (DP pull-up
auto-connection after SE0)
■ SEO active low interrupt in HNP mode (INT,
VCC_IO referred)
■ Very low power consumption to meet USB
'suspend' current requirements
■ No power supply sequencing requirements
■ Software controlled re-enumeration
(SOFTCON)
■ Available in small BCC++16L package
3 mm x 3 mm max thickness 0.80 mm halogen
free RoHS compliant package
Applications
■ Mobile phones
■ PDAs
■ MP3 players
■ Digital still cameras
BCC++16L
(3 mm x 3 mm)
Description
The STUSB06E is a single chip transceiver that
complies with the physical layer specifications of
the Universal Serial Bus (USB) v2.0 standard. It is
powered by external 3.3 V supply and has an
integratedwww.DataSheet.net/ 150 kΩ resistor to implement charger
detection with weak pull-up method.
The STUSB06E also supports sharing mode
when VREG is not present, which allows the D+/D-
lines to be shared with other serial protocols.
It supports both full-speed (12 Mbps) and low-
speed (1.5 Mbps) operation. It is also designed to
operate down to 1.6 V so that it is compatible with
lower system voltages of most portable systems,
which include cell phones, PDAs and MP3
players.
Table 1. Device summary
Order code
STUSB06EHTR
December 2008
Package
BCC++16L (3 mm x 3 mm)
Rev 1
Packaging
3000 parts per reel
1/20
www.st.com
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Datasheet pdf - http://www.DataSheet4U.co.kr/
1 page  
STUSB06E
Pin configuration
Table 2. Pin description (continued)
Pin° Symbol Type
Description
14 INT
O
Active Low output interrupt signal. Active when a SE0 is detected while in HNP
mode. This pin has an internal 220 kΩ pull-down to ground when HIGHZ=”H” only.
Data line pull-up supply voltage. Connect an external 1.5 kΩ resistor to D+ (full-
15 VPU PWR speed) or D- (low-speed). Pin output is controlled by SUSPEND, SPEED# and
SOFTCON inputs.
Normally used as Software controlled enumeration pin: controls the status of VPU
16 SOFTCON
I
pin and the connection of internal weak pull-up resistor. LOW: VPU floating
(SUSPEND=”0” or “1”). HIGH: VPU = 3.3 V. Functionality can change depending on
status of SPEED# and SUSPEND pins. See Table 12 for more details.
Exp GND PWR Ground reference
www.DataSheet.net/
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Datasheet pdf - http://www.DataSheet4U.co.kr/
5 Page 
STUSB06E
5 Functional description
Functional description
The STUSB06E is designed to provide USB connectivity in mobile systems. The
STUSB06E can operate down to digital I/O supply voltages of 1.6 V and still meet USB
physical layer specifications. The STUSB06E takes typical 3.3 V supply voltage, VREG, to
operate the transceiver. The system voltage, VCC_IO, is used to set the reference voltage
required by the digital I/O lines interfacing to the system controller. Internal circuitry provides
translation between the USB and system voltage domains. VCC_IO will typically be the main
supply voltage rail for the controller.
In addition, a termination supply voltage, VPU, is provided to support speed selection. VPU
can be disabled or enabled under software control via the SOFTCON input. This allows for
software-controlled connect or disconnect states. A 1.5 kΩ resistor is required to be
connected between this pin and the D+ (full-speed) or D- (low-speed) line; according to
Table 6 behavior, sometimes, an internal weak pull-up resistor is connected instead.
The VREG Input voltage ranging form 3 V to 3.6 V must be provided as main power supply.
The STUSB06E also supports sharing mode in which some pins are made 3-state to allow
data lines sharing.
5.1 Power supply configurations
The STUSB06E supports four power supply configurations.
Operating mode: Both VCC_IO and VREG are present. This is the standard configuration for
normal operation.
Disable mode: VREG is connected while VCC_IOwww.DataSheet.net/ is disconnected. D+ and D- pins are three-
stated and the power consumption is reduced.
Sharing mode: VCC_IO is connected while VREG is disconnected. HIGHZ input is left
floating or driven low. D+ and D- pins are three-stated and the differential data lines can be
shared with signals of up to 3.6 V. Power consumption is reduced in this mode. The pins VP
and VM are driven high and pin RCV is driven low.
High-Z mode: VCC_IO is connected while VREG is disconnected. High-Z input must be
driven High. Every output pin is three-stated and the differential data lines can be shared
with signals of up to 3.6 V. Power consumption is reduced in this mode. Refer to the
functional tables for more details regarding pin's status in these power modes.
Charger detection mode: An embedded weak pull-up resistor of 150 kΩ is used to
implement a resistive detection mechanism. According to USB Battery Charger
Specification rel.1.1, this method will reliably detect:
– Rechargeable Portable Device attached to Dedicated Charger Port or
– Rechargeable Portable Device attached to Standard Host Port.
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