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PDF PCA9621 Data sheet ( Hoja de datos )

Número de pieza PCA9621
Descripción 65 mA 8-bit 2-wire bus output port
Fabricantes NXP Semiconductors 
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No Preview Available ! PCA9621 Hoja de datos, Descripción, Manual

PCA9621
65 mA 8-bit 2-wire bus output port
Rev. 1 — 9 March 2011
Product data sheet
1. General description
The PCA9621 is a monolithic CMOS integrated circuit for general purpose output drive
configurable from a 2-wire bus interface (including I2C-bus, SMBus, PMBus, and other
systems based on similar principles). Output ports have a 65 mA sink capability, making
them ideal for driving LEDs.
The state of the outputs is determined by a programmable 8-bit register which can be read
and written via signals from the 2-wire bus (e.g., I2C-bus or similar).
The 2-wire bus interface also has 30 mA Fast-mode Plus (Fm+) capability, and
consequently can be run in excess of 1 MHz or up to 4000 pF capacitance. As such, the
PCA9621 can be connected to other 2-wire devices across long cable connections.
It can be mixed with other Fast-mode Plus slaves in systems driven by Fm+ buffers or by
the PCA9646 (fully buffered 4-channel bus switch) to build large scale systems with
high-speed or high-capacitance drive capability, for example large scale LED displays or
controlled lighting.
2. Features and benefits
„ 8 individually selectable open-drain output ports
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„ 65 mA static sink capability on all output ports
„ Ports may be paralleled for up to 500 mA drive
„ Ideal for simple LED or general purpose output drive
„ Fast-mode Plus (30 mA, 4000 pF) 2-wire bus capability
„ Works with I2C-bus (Standard-mode, Fast-mode, and Fast-mode Plus), SMBus
(standard and high power mode), and PMBus
„ Fast switching times allow operation in excess of 1 MHz
„ Operating voltages from 2.7 V to 5.5 V
3. Applications
„ LED and 7-segment displays
„ Simple high-power (500 mA) LED dimming
„ General purpose output
„ Instrumentation indicators
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PCA9621 pdf
NXP Semiconductors
PCA9621
65 mA 8-bit 2-wire bus output port
7.6 A0, A1, A2 — address lines
The slave address of the PCA9621 is shown in Figure 4. The address pins (A2, A1, A0)
must be driven to a HIGH or LOW level—they are not internally pulled to a default state.
1 1 0 0 A2 A1 A0 R/W
fixed
externally
selectable
read = 1
write = 0
002aaf383
Fig 4. Slave address
The read/write bit must be set LOW to enable a write to the Control register, or HIGH to
read from the Control register.
7.7 Control register
The Control register of the PCA9621 is shown in Figure 5. Each of the four output ports
can be activated independently by setting the appropriate bit in the Control register.
MSB P7 P6 P5 P4 P3 P2 P1 P0 LSB
002aaf384
Fig 5.
1 = ON (sinking)
0 = OFF (high-impedance)
Control register
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A LOW or ‘zero’ bit indicates that the respective channel (P7 to P0) is disabled
(high-impedance). The default reset condition of the register is all zeros, all ports
high-impedance. A HIGH or ‘one’ bit indicates the respective channel is active (sinking).
Example: Programming C1h (1100 0001b) into the Control register results in ports P0, P6
and P7 being ON (sinking) and the remaining ports being OFF (high-impedance).
PCA9621
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 9 March 2011
© NXP B.V. 2011. All rights reserved.
5 of 18
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PCA9621 arduino
NXP Semiconductors
12. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
PCA9621
65 mA 8-bit 2-wire bus output port
SOT109-1
y
Z
16
D
pin 1 index
1
e
EA
X
c
HE
vM A
9
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A2
A1
8
bp
wM
Q
(A3)
A
Lp
L
detail X
θ
0 2.5 5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
UNIT max. A1 A2 A3 bp
c
D (1) E (1)
e
HE
L
Lp Q
v
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
inches
0.069
0.010
0.004
0.057
0.049
0.01
0.019 0.0100 0.39
0.014 0.0075 0.38
0.16
0.15
0.05
0.244
0.228
0.041
0.039
0.016
0.028
0.020
0.01
w y Z (1)
0.25 0.1
0.7
0.3
0.01
0.004
0.028
0.012
θ
8o
0o
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
OUTLINE
VERSION
SOT109-1
IEC
076E07
REFERENCES
JEDEC
JEITA
MS-012
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 14. Package outline SOT109-1 (SO16)
PCA9621
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 9 March 2011
© NXP B.V. 2011. All rights reserved.
11 of 18
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