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PDF HX8363-A Data sheet ( Hoja de datos )
| Número de pieza | HX8363-A | |
| Descripción | 480RGB x 864 dot / 16.7M color / TFT Mobile Single Chip Driver | |
| Fabricantes | Himax | |
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( DOC No. HX8363-A-DS )
HX8363-A
480RGB x 864 dot, 16.7M color,http://www.DataSheet4U.net/
TFT Mobile Single Chip Driver
Preliminary version 03 July, 2011
datasheet pdf - http://www.DataSheet4U.net/
1 page  
HX8363-A
480RGB x 864 dot, 16.7M color, TFT
Mobile Single Chip Driver
List of Figures
July, 2011
Figure 4.1: Serial Data stream, write mode................................................................................31
Figure 4.2: Serial Interface protocol 3 wire serial interface (write mode)...................................32
Figure 4.3 : 3 wire Serial Interface protocol, read mode ............................................................33
Figure 4.4: 3 wire Serial Interface protocol, read mode for user define command ....................34
Figure 4.5: Display Module Data Transfer Recovery .................................................................34
Figure 4.6: DCK cycle ................................................................................................................35
Figure 4.7: 16 bit/pixel Color Order on the RGB I/F ...................................................................36
Figure 4.8: 18 bit/pixel Color Order on the RGB I/F ...................................................................37
Figure 4.9: 24bit/pixel Color Order on the RGB I/F ....................................................................38
Figure 4.10: General Timing Diagram........................................................................................39
Figure 4.11: Multiple HS Transmission packets .........................................................................40
Figure 4.12: Structure of the Short packet .................................................................................40
Figure 4.13: Structure of the Long packet..................................................................................41
Figure 4.14: The format of Data ID.............................................................................................41
Figure 4.15: Short- / Long- packet transmission command sequence ......................................42
Figure 5.1: Gamma adjustments different of source driver with digital gamma correction ........50
Figure 5.2: Grayscale Control ....................................................................................................52
Figure 5.3: Gamma Resister Stream and Gamma Reference Voltage .....................................54
Figure 5.4: Gamma Resister Stream .........................................................................................55
Figure 5.5: Gamma Curve according to the GC0 to GC3 Bit.....................................................94
Figure 5.6: Oscillation Circuit .....................................................................................................95
Figure 5.7: LCD Power Generation Scheme..............................................................................96
Figure 5.8: DC/DC Converter Circuit (PFM)...............................................................................97
Figure 5.9: DC/DC Converter Circuit (HX5186-A) .....................................................................98
Figure 5.10: Sleep Out Flow Chart – Command andhttp://www.DataSheet4U.net/ Self-Diagnostic Functions.....................100
Figure 5.11: Sleep Out Flow Chart Internal Function Detection...............................................101
Figure 5.12: Case 1 – NRESET line is held High or Unstable by Host at Power On...............103
Figure 5.13: Case 2 – NRESET line is held Low by Host at Power On ...................................104
Figure 5.14: CABC Block Diagram...........................................................................................105
Figure 5.15: Module architecture .............................................................................................106
Figure 5.16: CABC_PWM_OUT Output Duty ..........................................................................107
Figure 7.1: Power supply with PFM circuit ...............................................................................182
Figure 7.2: Power supply with HX5186-A ................................................................................183
Figure 8.1: 3-pin Serial Interface Characteristics .....................................................................187
Figure 8.2: Vertical Timings for RGB I/F ..................................................................................189
Figure 8.3: Horizontal Timing for RGB I/F................................................................................190
Figure 8.4: General Timings for RGB I/F .................................................................................191
Figure 8.5: Electrical Functions of a Fully D-PHY Transceiver ................................................192
Figure 8.6: Shows both the HS and LP signal levels ...............................................................192
Figure 8.7: Input Glitch Rejections of Low-Power Receivers...................................................195
Figure 8.8: DDR Clock Definition .............................................................................................198
Figure 8.9: Data to Clock Timing Definitions............................................................................199
Figure 8.10: Reset Input Timing...............................................................................................201
Figure 8.11: Power On Timing..................................................................................................202
Figure 8.12: Power Off Timing .................................................................................................203
Figure 9.1: Reference layout with PFM circuit .........................................................................204
Figure 9.2: Reference layout with HX5186-A...........................................................................205
Figure 10.1: OTP Programming Sequence..............................................................................211
Figure 10.2: OTP Programming Circuitry.................................................................................213
Himax Confidential
This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed
in whole or in part without prior written permission of Himax.
- P.5-
July, 2011
datasheet pdf - http://www.DataSheet4U.net/
5 Page 
HX8363-A
480RGBx864dots, TFT Mobile Single Chip Driver
3. Device Overview
3.1 Block Diagram
PVSS
S1 ~ S1440
1440
VTESTOUTP
VTESTOUTN
Gamma
2 adjustment
circuit
Source driving
V0p ~ V255p
Gray scale V0n ~ V255n
voltage
generator
DAC
Level shift
OSC
CABC_PWM_OUT
RCOSC
CABC
Latch
VDD1
VDD2
VDD3
VSSD
VSSA
VSSAC
DGC control
DATA SHEET Preliminary V03
G1 ~ G864
864
Voltage
referance
Gate
control
unit
VSPR
VSNR
VDDD
VREF
VDDDN
VCOM
DSI_LDO
Timing
control
DC/DC
Converter
OTP
Instruction
control
VGH
VGL
C21AP/C21AN
C22AP/C22AN
VSP
VSN
VCSW1
VCSW2
TS[7:0]
TEST[2:0]
RSO[2:0]
8
3
3
Serial data transfer interface
3 24
SCL DB[23:0] SDO
NCS
NRESET
SDI
http://www.DataSheet4U.net/
RGB interface
(18-bit /16-bit /24bit )
DSI
Interface
DSI_VCC
DSI_VSS
4
HSYNC
VSYNC
DCK
ENABLE
222
DSI_CP DSI_D0P DSI_D1P
DSI_CN DSI_D0N DSI_D1N
Himax Confidential
This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed
in whole or in part without prior written permission of Himax.
-P.11-
July, 2011
datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
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