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PDF HX8347-B Data sheet ( Hoja de datos )
| Número de pieza | HX8347-B | |
| Descripción | TFT Mobile Single Chip Driver | |
| Fabricantes | Himax | |
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( DOC No. HX8347-B-DS )
HX8347-B
240RGB x 320 dot, 262K color,http://www.DataSheet4U.net/
with internal GRAM,
TFT Mobile Single Chip Driver
Preliminary version 01 December, 2009
datasheet pdf - http://www.DataSheet4U.net/
1 page  
HX8347-B
240RGB x 320 dot, 262K color, with internal
GRAM, TFT Mobile Single Chip Driver
List of Figures
December, 2009
Figure 4.1: Register Read/Write Timing in Parallel Bus System Interface (for I80 Series MPU) ............. 27
Figure 4.2: GRAM Read/Write Timing in Parallel Bus System Interface (for I80 Series MPU) ............... 28
Figure 4.3: Example of I80- System 18-bit Parallel Bus Interface ........................................................... 31
Figure 4.4: Input Data Bus and GRAM Data Mapping in 18-Bit Bus System Interface with 18 Bit-Data
Input (“IM3, IM2, IM1, IM”=”1010” or “1000”) ......................................................................... 31
Figure 4.5: Example of I80 system 16-bit parallel bus interface type I .................................................... 32
Figure 4.6: Example of I80 system 16-bit parallel bus interface type II ................................................... 32
Figure 4.7: Input data bus and GRAM data mapping in 16-bit bus system interface with 16-bit-data..... 32
Figure 4.8: Input data bus and GRAM data mapping in 16-bit bus system interface with 18 bit-data ..... 33
Figure 4.9: Input data bus and GRAM data mapping in 16-bit bus system interface with 18(16+2) ....... 33
Figure 4.10: Input Data Bus and GRAM Data Mapping in 16-Bit Bus System Interface with 16 Bit-Data33
Figure 4.11: Input Data Bus and GRAM Data Mapping in 16-Bit Bus System Interface with 18(16+2)... 33
Figure 4.12 Input Data Bus and GRAM Data Mapping in 16-Bit Bus System Interface with 18(2+16)
Bit-Data Input (TRI = ‘1’, DFM = ‘1’ and “IM3, IM2, IM1, IM0”=”0010”)............................... 34
Figure 4.13: Example of I80 system 9-bit parallel bus interface type I .................................................... 35
Figure 4.14: Example of I80 system 9-bit parallel bus interface type II ................................................... 35
Figure 4.15: Input data bus and GRAM data mapping in 9-bit bus system interface with 18-bit-data..... 36
Figure 4.16 Input Data Bus and GRAM Data Mapping in 9-Bit Bus System Interface with 18 Bit-Data.. 36
Figure 4.17: Example of I80 system 8-bit parallel bus interface type I .................................................... 37
Figure 4.18: Example of I80 system 8-bit parallel bus interface type II ................................................... 37
Figure 4.19: Input data bus and GRAM data mapping in 8-bit bus system interface with 16-bit-data..... 37
Figure 4.20: Input data bus and GRAM data mapping in 8-bit bus system interface with 18-bit-data..... 37
Figure 4.21: Input Data Bus and GRAM Data Mapping in 8-Bit Bus System Interface with 16 Bit-Data
Input (TRI = ‘0’ and “IM3, IM2, IM1, IM0”=”0011”) ................................................................. 38
Figure 4.22: Input Data Bus and GRAM Data Mapping in 8-Bit Bus System Interface with 18 Bit-Data
Input (TRI = ‘1’, DFM = ‘0’ and “IM3, IM2, IM1,http://www.DataSheet4U.net/ IM0”=”0011”) ............................................... 38
Figure 4.23: Input Data Bus and GRAM Data Mapping in 8-Bit Bus System Interface with 18 Bit-Data
Input (TRI = ‘1’, DFM = ‘1’ and “IM3, IM2, IM1, IM0”=”0011”) ............................................... 38
Figure 4.24: Index Register Read/Write Timing in 3-wire Serial Bus System Interface........................... 41
Figure 4.25: Index Register Read/Write Timing in 3-wire Serial Bus System Interface........................... 42
Figure 4.26: Data Write Timing in 3-wire Serial Bus System Interface .................................................... 43
Figure 4.27: Index Register Write Timing in 4-wire Serial Bus System Interface..................................... 43
Figure 4.28: Data Write Timing in 4-wire Serial Bus System Interface .................................................... 44
Figure 4.29: Serial Peripheral Interface Data Format .............................................................................. 44
Figure 4.30: Serial Peripheral Interface Protocol in Command Write Operation ..................................... 45
Figure 4.31: Serial Peripheral Interface Protocol in GRAM Write Operation ........................................... 45
Figure 4.32: Command Read Operation in Serial Peripheral Interface ................................................... 46
Figure 4.33: Write data for RGB 5-6-5-bits (65k colors) input (TRI=’0’)................................................... 47
Figure 4.34: Write data for RGB 6-6-6-bits(262k colors) (TRI=’1’)........................................................... 47
Figure 4.35: VSYNC Interface to MPU..................................................................................................... 48
Figure 4.36: VSYNC Interface with Internal Clock and System Interface with Internal Clock ................. 50
Figure 4.37: RGB Interface Circuit Input Timing Diagram........................................................................ 51
Figure 4.38: Example of Update Still and Moving Picture ........................................................................ 52
Figure 4.39: Transition between System Interface Mode and RGB Interface Mode................................ 53
Figure 4.40: RAM Data Write Sequence through System Interface or RGB Interface during RGB ........ 54
Figure 4.41: Data Format for 18-bit Interface........................................................................................... 55
Figure 4.42: Data Format for16-bit Interface ............................................................................................ 55
Figure 4.43: Data Format for 6-bit Interface ............................................................................................. 55
Figure 5.1: GRAM window address mapping example ............................................................................ 59
Figure 5.2: TE Mode 1 Output.................................................................................................................. 60
Figure 5.3: TE Delay Output..................................................................................................................... 60
Figure 5.4: TE Mode 2 Output.................................................................................................................. 61
Figure 5.5: TE Output Waveform.............................................................................................................. 61
Figure 5.6: Waveform of Tearing Effect Signal ........................................................................................ 62
Figure 5.7: Timing of Tearing Effect Signal .............................................................................................. 62
Himax Confidential
This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed
in whole or in part without prior written permission of Himax.
-P.5-
December, 2009
datasheet pdf - http://www.DataSheet4U.net/
5 Page 
HX8347-B
240RGB x 320 dot, 262K color, TFT Mobile Single Chip Driver
2.4 Input power
Logic power supply (IOVCC): 1.65V ~ 3.3V
Analog power supply (VCI): 2.5V ~ 3.3V
Outputs
Source outputs: 720 source lines.
Selectable gate line control signal for glass 320 gate lines
Adjusted source voltages (V0p ~V63p, V0n ~V63n)
DATA SHEET Preliminary V01
Display interface:
System interface:
a. 8-/9-/16-/18-bit parallel bus system interface
b. 3-wire 24bits/3-wire 9bits/4-wire 8bits serial bus system interface
c. Vsync interface
RGB interface:
a. 6-/16-/18-bit RGB interface
2.5 Miscellaneous
Low power consumption, suitable for battery operated systems
Image sticking eliminated function
CMOS compatible inputs
Optimized layout for COG assembly
Proprietary multi phase driving for lower power consumption
http://www.DataSheet4U.net/
Support external VDDD for lower power consumption (such as 1.8 volts input)
Support Line inversion or Frame inversion
Support Area scrolling
Support Partial display mode
Support Deep standby mode
Support normal black/normal white LCD
Support wide view angle display
Audible noise reducing function
On-chip OTP (One-time-programming) and MTP(8-time-programming for some register)
non-volatile memory
Support Content Adaptive Brightness Control(CABC) function
Operating temperature range : -40℃~ 85℃
Himax Confidential
-P.11-
This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed
in whole or in part without prior written permission of Himax.
December, 2009
datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
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