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PDF TJA1086 Data sheet ( Hoja de datos )
| Número de pieza | TJA1086 | |
| Descripción | FlexRay active star coupler | |
| Fabricantes | NXP Semiconductors | |
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TJA1086
FlexRay active star coupler
Rev. 1 — 18 April 2013
Product data sheet
1. General description
The TJA1086 is a FlexRay active star coupler that connects two branches of a FlexRay
network. The TJA1086 is compliant with the FlexRay electrical physical layer specification
V3.0.1 (see Ref. 1).
Several TJA1085 and TJA1086 devices can be connected via their TRXD0/1 interfaces to
increase the number of branches in the network. A dedicated Communication Controller
(CC) interface allows for integration into an ECU. The TJA1086 supports low-power
management by offering bus wake-up capability along with battery supply and voltage
regulator control. The TJA1086 meets industry standards for EMC/ESD performance and
provides enhanced bus error detection, low current consumption and unmatched
asymmetric delay performance.
The TJA1086 also fulfills the JASPAR requirements as defined by the Japanese car
industry.
2. Features and benefits
2.1 General
Compliant with FlexRay Electrical Physicalhttp://www.DataSheet4U.net/ Layer specification V3.0.1.
Fulfills JASPAR requirements
Automotive product qualification in accordance with AEC-Q100
Data transfer rates from 2.5 Mbit/s to 10 Mbit/s
Supports 60 ns minimum bit time at 400 mV differential voltage
Low-power management for battery-supplied ECUs
Very low current consumption in AS_Sleep mode
Leadless HVQFN44 package with improved Automated Optical Inspection (AOI)
capability
2.2 Functional
Supports autonomous active star operation independent of the host ensuring the
TJA1086 remains active even if the host fails or is switched off
Branches can be independently configured
Branch extension via TRXD0/1 inner star interface
16-bit bidirectional SPI interface up to 2 Mbit/s for host communication
Full host control over branch status
Enhanced wake-up capability:
Remote wake-up via wake-up pattern and dedicated FlexRay data frames
datasheet pdf - http://www.DataSheet4U.net/
1 page  
NXP Semiconductors
TJA1086
FlexRay active star coupler
Table 2. Pin description …continued
Symbol Pin
Type[1] Description
LWU 16
I
local wake-up input; internal pull-up or pull-down (depends on
voltage at pin LWU)
VBAT
n.c.
17
18
P
-
battery supply voltage
not connected; to be connected to GND in application
GND2 19
G
ground connection 2[2]
n.c. 20
-
not connected; to be connected to GND in application
VBUF2
VCC2
n.c.
21
22
23
P
P
-
buffer supply voltage 2[3]
supply voltage 2[4]
not connected; to be left open in the application
n.c. 24
-
not connected; to be left open in the application
n.c. 25
-
not connected; to be connected to GND in application
n.c. 26
-
not connected; to be left open in the application
n.c. 27
-
not connected; to be left open in the application
n.c. 28
-
not connected; to be connected to GND in application
BM_2 29 IO bus line minus for branch 2[5]
BP_2 30 IO bus line plus for branch 2[6]
n.c. 31
-
not connected; to be connected to GND in application
BM_1 32 IO bus line minus for branch 1[5]
BP_1 33 IO bus line plus for branch 1[6]
VCC1
VBUF1
n.c.
34
35
36
P
P
-
supply voltage 1[4]http://www.DataSheet4U.net/
buffer supply voltage 1[3]
not connected; to be connected to GND in application
GND1 37
G
ground connection 1[2]
RES6 38
-
reserved; to be connected to GND in application
RES5 39
-
reserved; to be connected to GND in application
RES4 40
-
reserved; to be connected to GND in application
RES3 41
-
reserved; to be connected to GND in application
RES2 42
-
reserved; to be connected to GND in application
RES1 43
-
reserved; to be connected to GND in application
RSTN 44
I
reset input; internal pull-up
[1] IO: input/output; O: output; I: input; P: power supply; G: ground.
[2] GND1, GND2, GNDD and the exposed center pad of HVQFN44 package must be connected together on
the PCB; references in the data sheet to GND can be assumed to encompass GND1, GND2, GNDD and
the exposed center pad of HVQFN4 unless stated otherwise.
[3] VBUF1 and VBUF2 must be connected together on the PCB; note that references in the data sheet to VBUF
can be assumed to encompass VBUF1 and VBUF2 unless stated otherwise.
[4] VCC1 and VCC2 must be connected together on the PCB; note that references in the data sheet to VCC can
be assumed to encompass VCC1 and VCC2 unless stated otherwise.
[5] References in the data sheet to BM (e.g. pin BM or VBM) can be assumed to encompass BM_1 and BM_2
unless stated otherwise.
[6] References in the data sheet to BP (e.g. pin BP or VBP) can be assumed to encompass BP_1 and BP_2
unless stated otherwise.
TJA1086
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2013
© NXP B.V. 2013. All rights reserved.
5 of 62
datasheet pdf - http://www.DataSheet4U.net/
5 Page 
NXP Semiconductors
TJA1086
FlexRay active star coupler
Table 4.
Bus
DATA_0
DATA_1
idle
X
X
Bus as input
VIO UV RXD
detected
yes LOW
yes LOW
yes LOW
yes LOW
X HIGH
TRXD0
TRXD1
Operating mode
LOW
high ohmic[1]
high ohmic[1]
high ohmic[1]
high ohmic[1]
high ohmic[1]
LOW
high ohmic[1]
high ohmic[1]
high ohmic[1]
AS_Normal
AS_Normal
AS_Normal
AS_Standby, AS_Sleep
AS_PowerOff, AS_Reset
[1] Internal pull-up resistor (Rpu) to VBUF.
Table 5. TRXD0/1 interface configured as input
TRXD0
TRXD1
VIO UV
RXD
detected
Bus
X
falling edge no
HIGH
DATA_1
HIGH
HIGH
no
HIGH
idle
falling edge X
X
LOW
DATA_0
X
falling edge yes
LOW
DATA_1
HIGH
HIGH
yes
LOW
idle
LOW
LOW
X
LOW
DATA_0
[1] Activity detected on TRXD0/TRXD1.
Operating mode
AS_Normal[1]
AS_Normal
AS_Normal[1]
AS_Normal[1]
AS_Normal
collision detected on TRXD0/1
6.6 Bus error detection
http://www.DataSheet4U.net/
The TJA1086 provides bus error detection on each branch during data transmission.
When a transmit error (TxE_BRx = 1) is detected on a branch, an EVENT_BRx interrupt is
generated to notify the host.
The following conditions trigger bus error detection:
• Short circuit BP to BM
• Short-circuit BP to GND
• Short-circuit BM to GND
• Short-circuit BP to VCC or VBAT
• Short-circuit BM to VCC or VBAT
6.7 Interrupt generation
Interrupts are generated when specific events take place or associated status bits in the
General or Branch X status registers are set. When an interrupt is generated, the relevant
interrupt status bit is set in the Interrupt Status register (see Table 9) and pin INTN is
forced LOW.
Some interrupt status bits (PWON, WU, SPI_ERROR and HC_ERROR) are reset
immediately after the Interrupt Status register has been read successfully (i.e. a rising
edge on SCSN with no SPI_ERROR).
TJA1086
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2013
© NXP B.V. 2013. All rights reserved.
11 of 62
datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
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| PDF Descargar | [ Datasheet TJA1086.PDF ] | |
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