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PDF H27UAG8T2M Data sheet ( Hoja de datos )
| Número de pieza | H27UAG8T2M | |
| Descripción | 16Gbit (2Gx8bit) NAND Flash | |
| Fabricantes | Hynix | |
| Logotipo |  |
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1
Preliminary
H27UAG8T2M
16Gbit (2Gx8bit) NAND Flash
16Gb NAND FLASH
H27UAG8T2Mhttp://www.DataSheet4U.net/
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
use of circuits described. No patent licenses are implied.
Rev 0.2 / Apr. 2008
1
datasheet pdf - http://www.DataSheet4U.net/
1 page  
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Figure 1: Logic Diagram
1Preliminary
H27UAG8T2M
16Gbit (2Gx8bit) NAND Flash
IO7 - IO0
CLE
ALE
CE
RE
WE
WP
R/B
Vcc
Vss
NC
Data Input / Outputs
Command latch enable
Address latch enable
Chip Enable
Read Enable
Write Enable
Write Protect
Ready / Busy
Power Supply
Ground
No Connection
Table 1: Signal Names
http://www.DataSheet4U.net/
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1&
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1&
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Figure 2. 48TSOP1 Contact, x8 Device
Rev 0.2 / Apr. 2008
5
datasheet pdf - http://www.DataSheet4U.net/
5 Page 
1Preliminary
H27UAG8T2M
16Gbit (2Gx8bit) NAND Flash
3. DEVICE OPERATION
3.1 Page Read.
Page read operation is initiated by writing 00h and 30h to the command register along with five address cycles.
In two consecutive read operaions, the second one need 00h command, which five address cycles and 30h command
initiates that operation.
Two types of operations are available: random read, serial page read. The random read mode is enabled when the
page address is changed. The 4224 bytes of data within the selected page are transfered to the data registers in less
than 60us(tR). The system controller may detect the completion of this data transfer 60us(tR) by analyzing the output
of R/B pin. Once the data in a page is loaded into the data registers, they may be read out in 25ns cycle time by
sequentially pulsing RE. The repetitive high to low transitions of the RE clock make the device output the data starting
from the selected column address up to the last column address. The device may output random data in a page
instead of the consecutive sequential data by writing random data output command.
The column address of next data, which is going to be out, may be changed to the address which follows random data
output command.
Random data output can be operated multiple times regardless of how many times it is done in a page.
3.2 Multi-PLANE PAGE READ
Multi-Plane Page Read is an extension of Page Read, for a single plane with 4,224 byte page registers. Since the device
is equipped with two memory planes, activating the two sets of 4,224 byte page registers enables a random read of
two pages. Multi-Plane Page Read is initiated by repeating command 60h followed by three address cycles twice. In
this case only same page of same block can be selected from each plane.
After Read Confirm command(30h) the 8,448 bytes of data within the selected two page are transferred to the data
registers in less than 60us(tR). The system controller can detect the completion of data transfer(tR) by monitoring the
output of R/B pin.
Once the data is loaded into the data registers, the data output ofhttp://www.DataSheet4U.net/ first plane can be read out by issuing command 00h
with Five Address Cycles, command 05h with two column address and finally E0h. The data output of second plane
can be read out using the identical command sequences. The restrictions for Multi-Plane Page Read are shown in Fig-
ure 15. Multi-Plane Read must be used in the block which has been programmed with Multi-Plane Page Program.
Rev 0.2 / Apr. 2008
11
datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
| Páginas | Total 51 Páginas | |
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