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기능 UPFC ONE CYCLE CONTROL PFC IC
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IR1150SPBF 데이터시트, 핀배열, 회로
Data Sheet No. PD60230 revAa
IR1150S(PbF)
IR1150IS(PbF)
µPFC ONE CYCLE CONTROL PFC IC
Features
PFC with IR proprietary “One Cycle Control”
Continuous conduction mode (CCM) boost type PFC
No line voltage sense required
Programmable switching frequency (50kHz-200kHz)
Programmable output overvoltage protection
Brownout and output undervoltage protection
Cycle-by-cycle peak current limit
Soft start
User initiated micropower “Sleep Mode”
Open loop protection
Maximum duty cycle limit of 98%
User programmable fixed frequency operation
Min. off time of 150-350ns over freq range
VCC under voltage lockout
Internally clamped 13V gate drive
Fast 1.5A peak gate drive
Micropower startup (<200 µA)
Latch immunity and ESD protection
Parts also available Lead-Free
Description
Package
The µPFC IR1150 is a power factor correction (PFC) control IC designed to operate in continuous
conduction mode (CCM) over a wide range input line voltages. The IR1150 is based on IR's
proprietary "One Cycle Control" (OCC) technique providing a cost effective solution for PFC.
The proprietary control method allows major reductions in component count, PCB area and
design time while delivering the same high system performance as traditional solutions.
The IC is fully protected and eliminates the often noise sensitive line voltage sensing requirements
of existing solutions.
The IR1150 features include programmable switching frequency, programmable dedicated
8-Lead SOIC
over voltage protection, soft start, cycle-by-cycle peak current limit, brownout, open loop,
http://www.DataSheet4U.com/
UVLO and micropower startup current.
In addition, for low standby power requirements (Energy Star, 1W Standby, Blue Angel, etc.), the IC can be driven into sleep
mode with total current consumption below 200µA, by pulling the OVP pin below 0.62V.
IR1150 Application Diagram
AC LINE
BR ID GE
V OUT
AC NEUTRAL
IR 11 50
1 COM GATE 8
2 FREQ VCC 7
3 ISNS
VFB 6
4 OVP COMP 5
V cc
+
+
R TN
www.irf.com
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IR1150SPBF pdf, 반도체, 판매, 대치품
IR1150S/IR1150IS(PbF)
Internal Voltage Reference Section
Parameters
Symbols Min.
Reference voltage
Line regulation
Temp stability
Total variation
VREF
RREG
TSTAB
VTOT
6.9
6.8
Voltage Error Amplifier Section
Parameters
Symbols Min.
Transconductance
Source/sink current
Soft start delay time
(calculated)
VCOMP voltage (fault)
gm
IOVEA
tss
VCOMP FLT
30
30
20
Effective VCOMP voltage
Input bias current
Open loop bandwidth
Input offset voltage temp
coefficient
Common mode rejection ratio
Output low voltage
Output high voltage
VCOMP start voltage
VCOMP EFF
IIB
BW
TCIOV
CMRR
VOL
VOH
VCOMP START
5.71
300
Typ.
7.0
12
0.4
Max.
7.1
25
7.1
Typ.
40
±40
45
40
Max.
55
65
90
1.2
6.05
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-0.2
1
1.5
0.2
-0.5
— 10
100 —
— 0.5
6.15 6.8
500 700
Units
V
mV
%
V
Units
µS
µA
µA
ms
V
V
V
µA
MHz
µV/oC
dB
V
V
mV
Remarks
TA = 25oC
13.5V <VCC < 20V
-25oC TAMB125oC
Over VCC and Tj ranges
Remarks
-25oC TAMB125oC
TAMB = 25oC
-25oC TAMB125oC
RGAIN=1k, CZERO=0.33µF
CPOLE=0.01µF, fXO=28Hz
@ 1mA (max) initial
@ 25µA steady state
VFB=0V, -25oC TAMB125oC
Current Amplifier Section
Parameters
DC gain
Corner frequency
Input offset voltage
ISNS bias current
Input offset voltage temp
coefficient
Common mode rejection ratio
Blanking time
Symbols
gDC
fC
VIO
ΙIB
Min.
200
Typ.
2.5
1
200
TCIOV
CMRR
TBLANK
——
— 100
230 350
150
Max.
280
4
300
Units
V/V
kHz
mV
µA
Remarks
VFB=0V,-25oC TAMB125oC
10 µV/oC
— dB
450 ns TAMB = 25oC
600 ns -25oC TAMB125oC
www.irf.com
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IR1150SPBF 전자부품, 판매, 대치품
IR1150S/IR1150IS(PbF)
General Description
The µPFC IR1150 is intended for boost converters
for power factor correction operating at a fixed
frequency in continuous conduction mode. The IC
operates with two loops; an inner current loop and
an outer voltage loop. The inner current loop is fast,
reliable and does not require sensing of the input
voltage in order to create a current reference.
This inner current loop sustains the sinusoidal profile
of the average input current based on the dependency
of the pulse width modulator duty cycle on the input
line voltage in order to determine the analogous input
line current. Thus, the current loop uses the
embedded input voltage signal to control the average
input current to follow the input voltage.
The IR1150 enables excellent THD performance. In
light load conditions, a small distortion occurs at zero-
crossing due to the finite boost inductance but this is
negligible and well within EN61000-3-2 Class D
specifications.
The outer voltage loop controls the DC bus voltage.
This voltage is fed into the voltage error amplifier to
control the slope of the integrator ramp and sets the
amplitude of the average input current.
The two loops combine to control the amplitude,
phase and shape of the input current, with respect to
the input voltage, giving near-unity power factor.
The IC is designed for robust operation and pro-
vides protection from system level over current, over
voltage, under voltage, and brownout conditions.
IC Supply
The UVLO circuit monitors the VCC pin and maintains
the gate drive signal inactive until the VCC pin voltage
reaches the UVLO turn on threshold, (VCC ON). As soon
as the VCC voltage exceeds this threshold, provided
that the VFB pin voltage is greater than 20%VREF, the
gate drive will begin switching (under Soft Start) and
increase the pulse width to its maximum value as
demanded by the output voltage error amplifier. If
the voltage on the VCC pin falls below the UVLO turn
off threshold, (VCC UVLO), the IC turns off, gate drive is
terminated, and the turn on threshold must again be
exceeded in order to re-start the process and move
into Soft Start mode.
Soft Start
Soft Start controls the rate of rise of the output voltage
errorhttp://www.DataSheet4U.com/ amplifier in order to obtain a linear control of
the increasing duty cycle as a function of time. The
Soft Start time is controlled by voltage error amplifier
compensation components selected, and is user
programmable based on desired loop crossover
frequency.
Frequency Select
The switching frequency of the IC is programmable
by an external resistor at the FREQ pin. The design
incorporates min/max restrictions such that the
minimum and maximum operating frequency fall
within the range of 50-200kHz.
Gate Drive
The gate drive is a totem pole driver with 1.5A
capability. If higher currents are required, additional
external drivers can be used.
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IR1150SPBF

UPFC ONE CYCLE CONTROL PFC IC

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