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ADP5040 데이터시트 PDF




Analog Devices에서 제조한 전자 부품 ADP5040은 전자 산업 및 응용 분야에서
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부품번호 ADP5040 기능
기능 Micro PMU
제조업체 Analog Devices
로고 Analog Devices 로고


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ADP5040 데이터시트, 핀배열, 회로
Data Sheet
Micro PMU with 1.2 A Buck Regulator
and Two 300 mA LDOs
ADP5040
FEATURES
GENERAL DESCRIPTION
Input voltage range: 2.3 V to 5.5 V
One 1.2 A buck regulator
Two 300 mA LDOs
20-lead, 4 mm × 4 mm LFCSP package
Overcurrent and thermal protection
Soft start
Undervoltage lockout
Buck key specifications
Output voltage range: 0.8 V to 3.8 V
Current mode topology for excellent transient response
3 MHz operating frequency
Peak efficiency up to 96%
Uses tiny multilayer inductors and capacitors
Mode pin selects forced PWM or auto PWM/PSM modes
100% duty cycle low dropout mode
LDOs key specifications
Output voltage range: 0.8 V to 5.2 V
Low VIN from 1.7 V to 5.5 V
Stable with 2.2 µF ceramic output capacitors
High PSRR
Low output noise
Low dropout voltage
−40°C to +125°C junction temperature range
The ADP5040 combines one high performance buck regulator
and two low dropout regulators (LDO) in a small 20-lead
LFCSP to meet demanding performance and board space
requirements.
The high switching frequency of the buck regulator enables the use
of tiny multilayer external components and minimizes board space.
When the MODE pin is set to logic high, the buck regulator
operates in forced pulse width modulation (PWM) mode.
When the MODE pin is set to logic low, the buck regulator
operates in PWM mode when the load is around the nominal
value. When the load current falls below a predefined threshold
the regulator operates in power save mode (PSM) improving
the light-load efficiency. The low quiescent current, low
dropout voltage, and wide input voltage range of the ADP5040
LDOs extend the battery life of portable devices. The ADP5040
LDOs maintain a power supply rejection greater than 60 dB for
frequencies as high as 10 kHz while operating with a low headroom
voltage.
Each regulator in the ADP5040 is activated by a high level on
the respective enable pin. The output voltages of the regulators
http://www.DataSheet4U.com/ are programmed though external resistor dividers to address a
variety of applications.
FUNCTIONAL BLOCK DIAGRAM
VOUT1
RFILT = 30Ω
AVIN
VIN1 = 2.3V TO
5.5V
C5
4.7µF
VIN2 = 1.7V
TO 5.5V
C1
1µF
AVIN
VIN1
BUCK
ON
OFF
EN1
VIN2
ON
OFF
EN2
EN_BK
LDO1
(DIGITAL)
EN_LDO1
L1
1µH
SW
FB1
R2 R1
VOUT1 AT
1.2A
C6
10µF
PGND
MODE
VOUT2
FB2
R4
FPWM
PSM/PWM
VOUT2 AT
300mA
R3
C2
2.2µF
ON
OFF
EN3
VIN3 = 1.7V
TO 5.5V
VIN3
C3
1µF
EN_LDO2
LDO2
(ANALOG)
AGND
VOUT3
FB3
R3
R7
VOUT3 AT
300mA
C4
2.2µF
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.




ADP5040 pdf, 반도체, 판매, 대치품
ADP5040
Data Sheet
Parameter
SW CHARACTERISTICS
SW On Resistance
Current Limit
ACTIVE PULL-DOWN
OSCILLATOR FREQUENCY
Symbol
RPFET
RNFET
ILIMIT
FOSC
Test Conditions/Comments
PFET, AVIN = VIN1 = 3.6 V
PFET, AVIN = VIN1 = 5 V
NFET, AVIN = VIN1 = 3.6 V
NFET, AVIN = VIN1 = 5 V
PFET switch peak current limit
EN1 = 0 V
1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).
Min Typ Max Unit
1600
2.5
180
140
170
150
1950
85
3.0
240
190
235
210
2300
3.5
mA
Ω
MHz
LDO1, LDO2 SPECIFICATIONS
VIN2, VIN3 = (VOUT2,VOUT3 + 0.5 V) or 1.7 V (whichever is greater) to 5.5V; AVIN, VIN1 ≥ VIN2, VIN3; CIN = 1 μF , COUT = 2.2 μF;
TJ= −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted. 1
Table 3.
Parameter
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT
Bias Current per LDO2
Symbol
VIN2, VIN3
I /IVIN2BIAS VIN3BIAS
Conditions
TJ = −40°C to +125°C
IOUT3 = IOUT4 = 0 μA
IOUT2 = IOUT3 = 10 mA
IOUT2 = IOUT3 = 300 mA
Min Typ Max
1.7 5.5
10 30
60 100
165 245
Unit
V
μA
μA
μA
Total System Input Current IIN
Includes all current into AVIN, VIN1, VIN2 and VIN3
LDO1 or LDO2 Only
IOUT2 = IOUT3 = 0 μA, all other channels disabled
53 μA
LDO1 and LDO2 Only
IOUT2 = IOUT3 = 0 μA, buck disabled
74 μA
OUTPUT VOLTAGE ACCURACY VOUT2, VOUT3
http://www.DataSheet4
100 μA < IOUT2 < 300 mA, 100 μA < IOUT3 < 300 mA
VIN2 = (VOUT2 + 0.5 V) to 5.5 V,
VIN3 = (VOUT3 + 0.5 V) to 5.5 V
−3
+3 %
REFERENCE VOLTAGE
VFB2, VFB3
0.485 0.500 0.515 V
REGULATION
Line Regulation
(ΔVOUT2/VOUT2)/ΔVIN2
(ΔVOUT3/VOUT3)/ΔVIN3
VIN2 = (VOUT2 + 0.5 V) to 5.5 V
VIN3 = (VOUT3 + 0.5 V) to 5.5 V
−0.03
+0.03 %/ V
IOUT2 = IOUT3 = 1 mA
Load Regulation3
(ΔVOUT2/VOUT2)/ΔIOUT2
(ΔVOUT3/VOUT3)/ΔIOUT3
IOUT2 = IOUT3 = 1 mA to 300 mA
0.002 0.0075 %/mA
DROPOUT VOLTAGE4
VDROPOUT
VOUT2 = VOUT3 = 5.0 V, IOUT2 = IOUT3 = 300 mA
72 mV
VOUT2 = VOUT3 = 3.3 V, IOUT2 = IOUT3 = 300 mA
86 140 mV
VOUT2 = VOUT3 = 2.5 V, IOUT2 = IOUT3 = 300 mA
107 mV
VOUT2 = VOUT3 = 1.8 V, IOUT2 = IOUT3 = 300 mA
180 mV
ACTIVE PULL-DOWN
RPDLDO
EN2/EN3 = 0 V
600 Ω
CURRENT-LIMIT THRESHOLD5 ILIMIT
TJ = −40°C to +125°C
335 470
mA
OUTPUT NOISE
OUTLDO2NOISE
10 Hz to 100 kHz, VIN3 = 5 V, VOUT3 = 3.3 V
123 μV rms
10 Hz to 100 kHz, VIN3 = 5 V, VOUT3 = 2.8 V
110 μV rms
10 Hz to 100 kHz, VIN3 = 5 V, VOUT3 = 1.5 V
59 μV rms
OUTLDO1NOISE
10 Hz to 100 kHz, VIN2 = 5 V, VOUT2 = 3.3 V
140 μV rms
10 Hz to 100 kHz, VIN2 = 5 V, VOUT2 = 2.8 V
10 Hz to 100 kHz, VIN2 = 5 V, VOUT2 = 1.5 V
129 μV rms
66 μV rms
Rev. 0 | Page 4 of 40

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ADP5040 전자부품, 판매, 대치품
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADP5040
TOP VIEW
(Not to Scale)
ADP5040
FB3 1
VOUT3 2
VIN3 3
EN3 4
NC 5
15 FB2
14 VOUT2
13 VIN2
12 FB1
11 VOUT1
NOTES
1. EXPOSED PAD MUST BE CONNECTED TO
SYSTEM GROUND PLANE.
Figure 2. Pin Configuration—View from Top of the Die
Table 7. Preliminary Pin Function Descriptions
Pin No.
Mnemonic Description
1 FB3 LDO2 Feedback Input.
2
VOUT3
LDO2 Output Voltage.
3 VIN3 LDO2 Input Supply (1.7 V to 5.5 V).
4 EN3 Enable LDO2. EN3 = high: turn on LDO2; EN3 = low: turn off LDO2.
6
AVIN
Housekeeping Input Supply (2.3 V to 5.5 V).
http://www.DataSheet4U.com/
7 VIN1 Buck Input Supply (2.3 V to 5.5 V).
8 SW Buck Switching Node.
9
PGND
Dedicated Power Ground for Buck Regulator.
10 EN1 Enable Buck. EN1 = high: turn on buck; EN1 = low: turn off buck.
11
VOUT1
Buck Output Sensing Node.
12 FB1 Buck Feedback Input.
13 VIN2 LDO1 Input Supply (1.7 V to 5.5 V).
14
VOUT2
LDO1 Output Voltage.
15 FB2 LDO1 Feedback Input.
16 EN2 Enable LDO1. EN2 = high: turn on LDO1; EN2 = low: turn off LDO1.
17
MODE
Buck Mode. Mode = high: buck regulator operates in fixed PWM mode; mode = low: buck regulator operates in
power save mode (PSM) at light load and in constant PWM at higher load.
5, 18, 19, 20 NC
Not Connected.
0
EPAD
Exposed Pad. ( AGND = Analog Ground). The exposed pad must be connected to the system ground plane.
Rev. 0 | Page 7 of 40

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