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ATA5724 데이터시트 PDF




ATMEL Corporation에서 제조한 전자 부품 ATA5724은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 ATA5724 자료 제공

부품번호 ATA5724 기능
기능 (ATA5723 - ATA5728) UHF ASK/FSK Receiver
제조업체 ATMEL Corporation
로고 ATMEL Corporation 로고


ATA5724 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




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ATA5724 데이터시트, 핀배열, 회로
Features
Frequency Receiving Range of (3 Versions)
– f0 = 312.5 MHz to 317.5 MHz or
– f0 = 431.5 MHz to 436.5 MHz or
– f0 = 868 MHz to 870 MHz
30 dB Image Rejection
Receiving Bandwidth
– BIF = 300 kHz for 315 MHz/433 MHz Version
– BIF = 600 kHz for 868 MHz Version
Fully Integrated LC-VCO and PLL Loop Filter
Very High Sensitivity with Power Matched LNA
– ATA5723/ATA5724:
–107 dBm, FSK, BR_0 (1.0 kBit/s to 1.8 kBit/s), Manchester, BER 10E-3
–113 dBm, ASK, BR_0 (1.0 kBit/s to 1.8 kBit/s), Manchester, BER 10E-3
– ATA5728:
–105 dBm, FSK, BR_0 (1.0 kBit/s to 1.8 kBit/s), Manchester, BER 10E-3
–111 dBm, ASK, BR_0 (1.0 kBit/s to 1.8 kBit/s), Manchester, BER 10E-3
High System IIP3
– –18 dBm at 868 MHz
– –23 dBm at 433 MHz
– –24 dBm at 315 MHz
System 1-dB Compression Point
– –27.7 dBm at 868 MHz
– –32.7 dBm at 433 MHz
– –33.7 dBm at 315 MHz
High Large-signal Capability at GSM Band (Blocking –33 dBm at +10 MHz,
IIP3 = –24 dBm at +20 MHz)
Logarithmic RSSI Output
XTO Start-up with Negative Resistor of 1.5 kΩ
5V to 20V Automotive Compatible Data Interface
Data Clock Available for Manchester and Bi-phase-coded Signals
Programmable Digital Noise Suppression
Low Power Consumption Due to Configurable Polling
Temperature Range –40°C to +105°C
ESD Protection 2 kV HBM, All Pins
Communication to Microcontroller Possible using a Single Bi-directional Data Line
Low-cost Solution Due to High Integration Level with Minimum External Circuitry
Requirements
Supply Voltage Range 4.5V to 5.5V
Benefits
Low BOM List Due to High Integration
Use of Low-cost 13 MHz Crystal
Lowest Average Current Consumption for Application Due to Self Polling Feature
Reuse of ATA5743 Software
World-wide Coverage with One PCB Due to 3 Versions are Pin Compatible
UHF ASK/FSK
Receiver
ATA5723
ATA5724
ATA5728
9106E–RKE–07/08
Free Datasheet http://www.datasheet4u.com/




ATA5724 pdf, 반도체, 판매, 대치품
2. Pin Configuration
Figure 2-1. Pinning SSO20
SENS 1
20 DATA
IC_ACTIVE 2
19 POLLING/_ON
CDEM 3
18 DGND
AVCC 4
17 DATA_CLK
TEST1 5
RSSI 6
ATA5723/
ATA5724/
ATA5728
16 MODE
15 DVCC
AGND 7
14 XTAL2
LNAREF 8
13 XTAL1
LNA_IN 9
12 TEST3
LNAGND 10
11 TEST2
Table 2-1.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Pin Description
Symbol
SENS
IC_ACTIVE
CDEM
AVCC
TEST 1
RSSI
AGND
LNAREF
LNA_IN
LNAGND
TEST 2
TEST 3
XTAL1
XTAL2
DVCC
16 MODE
17 DATA_CLK
18 DGND
19 POLLING/_ON
20 DATA
Function
Sensitivity-control resistor
IC condition indicator: Low = sleep mode, High = active mode
Lower cut-off frequency data filter
Analog power supply
Test pin, during operation at GND
RSSI output
Analog ground
High-frequency reference node LNA and mixer
RF input
DC ground LNA and mixer
Do not connect during operating
Test pin, during operation at GND
Crystal oscillator XTAL connection 1
Crystal oscillator XTAL connection 2
Digital power supply
Selecting 315 MHz/other versions
Low: 315 MHz version (ATA5723)
High: 433 MHz/868 MHz versions (ATA5724/ATA5728)
Bit clock of data stream
Digital ground
Selects polling or receiving mode; Low: receiving mode, High: polling mode
Data output/configuration input
4 ATA5723/ATA5724/ATA5728
9106E–RKE–07/08
Free Datasheet http://www.datasheet4u.com/

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ATA5724 전자부품, 판매, 대치품
ATA5723/ATA5724/ATA5728
Figure 4-1. RSSI Characteristics ATA5724
RSSI Characteristics
3.5
3
2.5
2
1.5
1
-120 -110 -100 -90 -80 -70 -60 -50 -40
PIN (dBm)
4.5V -40˚C
5V -40˚C
5.5V -40˚C
4.5V 25˚C
5V 25˚C
5.5V 25˚C
4.5V 85˚C
5V 85˚C
5.5V 85˚C
4.5V 105˚C
5V 105˚C
5.5V 105˚C
The output voltage of the RSSI amplifier is internally compared to a threshold voltage VTh_red.
VTh_red is determined by the value of the external resistor RSens. RSens is connected between pin
SENS and GND or VS. The output of the comparator is fed into the digital control logic. By this
means, it is possible to operate the receiver at a lower sensitivity.
If RSens is connected to GND, the receiver switches to full sensitivity. It is also possible to con-
nect the pin SENS directly to GND to get the maximum sensitivity.
If RSens is connected to VS, the receiver operates at a lower sensitivity. The reduced sensitivity is
defined by the value of RSens, and the maximum sensitivity is defined by the signal-to-noise ratio
of the LNA input. The reduced sensitivity depends on the signal strength at the output of the
RSSI amplifier.
Since different RF input networks may exhibit slightly different values for the LNA gain, the sen-
sitivity values given in the electrical characteristics refer to a specific input matching. This
matching is described and illustrated in Section 14. “Data Interface” on page 32.
RSens can be connected to VS or GND using a microcontroller. The receiver can be switched
from full sensitivity to reduced sensitivity or vice versa at any time. In polling mode, the receiver
does not wake up if the RF input signal does not exceed the selected sensitivity. If the receiver is
already active, the data stream at pin DATA disappears when the input signal is lower than
defined by the reduced sensitivity. Instead of the data stream, the pattern according to Figure
4-2 “Steady L State Limited DATA Output Pattern” is issued at pin DATA to indicate that the
receiver is still active (see Figure 13-2 on page 30 “Data Interface”).
Figure 4-2. Steady L State Limited DATA Output Pattern
DATA
tDATA_min
tDATA_L_max
9106E–RKE–07/08
7
Free Datasheet http://www.datasheet4u.com/

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