TJ2995 Datasheet PDF - HTC Korea
| Part Number | TJ2995 | |
| Description | DDR Termination Regulator | |
| Manufacturers | HTC Korea | |
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DDR Termination Regulator
TJ2995
FEATURES
z Low Output Voltage Offset
z Works with +5V, +3.3V, and 2.5V Rails
z Source and Sink Current
z Low External Component Count
z No External Resistors Required
z Linear Topology
z Available in SOP8, SOP8-PP Package
z Low Cost and Easy to Use
APPLICATION
z DDR-I and DDR-II Termination Voltage
z SSTL-2 and SSTL-3 Termination
DESCRIPSION
SOP8 / SOP8-PP PKG
ORDERING INFORMATION
Device (Marking)
TJ2995D
TJ2995DP
Package
SOP8
SOP8-PP
The TJ2995 linear regulator is designed to meet the JEDEC SSTL-2 and SSTL-3 specifications for termination
of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load
transient. This device can deliver 1.5A continuous current and transient peaks up to 3A in the application as
required for DDR-SDRAM termination. With an independent VSENSE pin, the TJ2995 can provide superior load
regulation. The TJ2995 provides a VREF output as the reference for the chipset and DDR DIMMS. The TJ2995
can easily provide the accurate VTT and VREF voltages without external resistors that PCB areas can be
reduced. The quiescent current is low to meet the low power consumption applications.
Absolute Maximum Ratings
CHARACTERISTIC
Supply Voltage to GND
Lead Temperature (Soldering, 10 sec)
Storage Temperature Range
Operating Junction Temperature Range
SYMBOL
PVIN
AVIN
VDDQ
TSOL
TSTG
TJOPR
MIN.
-0.3
-0.3
-0.3
-65
-40
Recommended Operation Range
AVIN to GND
PVIN to GND
CHARACTERISTIC
SYMBOL
AVIN
PVIN
MIN.
2.3
0
Ordering Information
Package
Order No.
SOP8
TJ2995D
SOP8-PP TJ2995DP
Description
DDR Termination Regulator
DDR Termination Regulator
Package Marking
TJ2995
TJ2995
Reel
Reel
MAX.
6.0
6.0
6.0
260
150
125
UNIT
V
℃
℃
℃
MAX.
5.5
AVIN
UNIT
V
V
Supplied As
Oct. 2009 - Rev. 1.1
1/9
HTC
Free Datasheet http://www.datasheet4u.com/
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DDR Termination Regulator
TJ2995
DESCRIPTION
The TJ2995 is a linear bus termination regulator designed to meet the JEDEC requirements of SSTL-2
and SSTL-3. The TJ2995 is capable of sinking and sourcing current at the output VTT, regulating the
voltage to equal VDDQ / 2. A buffered reference voltage that also tracks VDDQ / 2 is generated on the VREF
pin for providing a global reference to the DDR-SDRAM and Northbridge Chipset. VTT is designed to
track the VREF voltage with a tight tolerance over the entire current range while preventing shoot through
on the output stage.
Series Stub Termination Logic (SSTL) was created to improve signal integrity of the data transmission
across the memory bus. This termination scheme is essential to prevent data error from signal reflections
while transmitting at high frequencies encountered with DDR RAM. The most common form of termination
is Class II single parallel termination. This involves using one RS series resistor from the chipset to the
memory and one RT termination resistor. This implementation can be seen below in Figure 1.
PIN DESCRIPTION
FIGURE 1. SSTL-Termination Scheme
AVIN AND PVIN
AVIN and PVIN are the input supply pins for the TJ2995. AVIN is used to supply all the internal control
circuitry for the two op-amps and the output stage of VREF. PVIN is used exclusively to provide the rail
voltage for the output stage on the power operational amplifier used to create VTT. For SSTL-2
applications AVIN and PVIN pins should be connected directly and tied to the 2.5V rail for optimal
performance. This eliminates the need for bypassing the two supply pins separately.
VDDQ
VDDQ is the input used to create the internal reference voltage for regulating VTT. The reference
voltage is generated from a resistor divider of two internal 50㏀ resistors. This guarantees that VTT will
track VDDQ / 2 precisely. The optimal implementation of VDDQ is as a remote sense. This can be
achieved by connecting VDDQ directly to the 2.5V rail at the DIMM instead of AVIN and PVIN. This ensures
that the reference voltage tracks the DDR memory rails precisely without a large voltage drop from
the power lines. For SSTL-2 applications VDDQ will be a 2.5V signal, which will create a 1.25V
termination voltage at VTT (See Electrical Characteristics Table for exact values of VTT over
temperature).
Oct. 2009 - Rev. 1.1
5/9
HTC
Free Datasheet http://www.datasheet4u.com/
Preview 5 Page |
Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for TJ2995 electronic component. |
| Information | Total 9 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ TJ2995.PDF Datasheet ] | |
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