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PDF TJ2997 Data sheet ( Hoja de datos )
| Número de pieza | TJ2997 | |
| Descripción | DDR Termination Regulator | |
| Fabricantes | HTC Korea | |
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DDR Termination Regulator
TJ2997
FEATURES
z Source and sink current
z Low output voltage offset
z No external resistors required
z Linear topology
z Suspend to Ram (STR) functionality
z Low external component count
z Thermal Shutdown
z Available in SOP8, SOP8-PP Packages
APPLICATION
z DDR -II and -III Termination Voltage
z SSTL Termination
z HSTL Termination
SOP8 / SOP8-PP PKG
ORDERING INFORMATION
Device
TJ2997GD
TJ2997GDP
Package
SOP8
SOP8-PP
DESCRIPSION
The TJ2997 linear regulator is designed to meet the JEDEC SSTL specifications for termination of DDR-
SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load
transients. The output stage prevents shoot through while delivering up to 1.5A continuous current and
transient peaks up to 3A with respect to PVIN operating condition in the application as required for DDR-
SDRAM termination. The TJ2997 also incorporates a VSENSE pin to provide superior load regulation and a
VREF output as a reference for the chipset and DIMMs. An additional feature found on the TJ2997 is an
active high enable (EN) pin that provides Suspend To RAM (STR) functionality. When EN is pulled low the
VTT output will tri-state providing a high impedance output, but, VREF will remain active. A power savings
advantage can be obtained in this mode through lower quiescent current.
Absolute Maximum Ratings
CHARACTERISTIC
Supply Voltage to GND
Lead Temperature (Soldering, 10 sec)
Storage Temperature Range
Operating Junction Temperature Range
Recommended Operation Range
SYMBOL
PVIN
AVIN
VDDQ
TSOL
TSTG
TJOPR
MIN.
-0.3
-0.3
-0.3
-65
-40
MAX.
6.0
6.0
6.0
260
150
125
UNIT
V
℃
℃
℃
CHARACTERISTIC
AVIN to GND
PVIN & EN to GND
Ordering Information
SYMBOL
AVIN
PVIN & EN
MIN.
2.3
0
MAX.
5.5
AVIN
UNIT
V
V
Package
SOP8
SOP8-PP
Order No.
TJ2997GD
TJ2997GDP
Description
DDR Termination Regulator
DDR Termination Regulator
Package Marking
TJ2997G
TJ2997G
Supplied As
Reel
Reel
Apr, 2011 - R1.0.1
1/13
HTC
Free Datasheet http://www.datasheet4u.com/
1 page  
DDR Termination Regulator
DESCRIPTION
TJ2997
The TJ2997 is a linear bus termination regulator designed for DDR II and DDR III memories. The
output, VTT is capable of sinking and sourcing current while regulating the output voltage equal to VDDQ / 2.
The output stage has been designed to maintain excellent load regulation while preventing shoot through.
The TJ2997 also incorporates two distinct power rails that separate the analog circuitry from the power
output stage. This allows a split rail approach to be utilized to decrease internal power dissipation. It
also permits the TJ2997 to provide a termination solution for the next generation of DDR-SDRAM
memory..
Series Stub Termination Logic (SSTL) was created to improve signal integrity of the data transmission
across the memory bus. This termination scheme is essential to prevent data error from signal
reflections while transmitting at high frequencies encountered with DDR-SDRAM. The most common
form of termination is Class II single parallel termination. This involves one RS series resistor from the
chipset to the memory and one RT termination resistor. Typical values for RS and RT are 25 Ohms,
although these can be changed to scale the current requirements from the TJ2997. This implementation
can be seen below in Figure 1.
FIGURE 1. SSTL-Termination Scheme
PIN DESCRIPTION
AVIN AND PVIN
AVIN and PVIN are the input supply pins for the TJ2997. AVIN is used to supply all the internal control
circuitry. PVIN, however, is used exclusively to provide the rail voltage for the output stage used to
create VTT. These pins have the capability to work off separate supplies depending on the application.
Higher voltages on PVIN will increase the maximum continuous output current because of output RDSON
limitations at voltages close to VTT. The disadvantage of high values of PVIN is that the internal power
loss will also increase, thermally limiting the design.
The limitation on input voltage selection is that PVIN must be equal to or lower than AVIN. It is
recommended to connect PVIN to voltage rails equal to or less than 3.3V to prevent the thermal limit from
tripping because of excessive internal power dissipation. If the junction temperature exceeds the
thermal shutdown then the part will enter a shutdown state where both VTT and VREF are tri-stated.
VDDQ
VDDQ is the input used to create the internal reference voltage for regulating VTT. The reference
voltage is generated from a resistor divider of two internal 50kΩ resistors. This guarantees that VTT will
track VDDQ / 2 precisely. The optimal implementation of VDDQ is as a remote sense. This can be
Apr, 2011 - R1.0.1
5/13
HTC
Free Datasheet http://www.datasheet4u.com/
5 Page 
DDR Termination Regulator
TJ2997
LEVEL SHIFTING
If standards other than SSTL-2 are required, such as SSTL-3, it may be necessary to use a different
scaling factor than 0.5 times VDDQ for regulating the output voltage. Several options are available to
scale the output to any voltage required. One method is to level shift the output by using feedback
resistors from VTT to the VSENSE pin. This has been illustrated in Figures 7 and 8. Figure 7 shows how
to use two resistors to level shift VTT above the internal reference voltage of VDDQ / 2. To calculate the
exact voltage at VTT the following equation can be used
VTT = VDDQ / 2 ( 1 + R1 / R2 )
FIGURE 7. Increasing VTT by Level Shifting
Conversely, the R2 resistor can be placed between VSENSE and VDDQ to shift the VTT output lower than
the internal reference voltage of VDDQ / 2. The equations relating VTT and the resistors can be seen
below:
VTT = VDDQ / 2 (1 - R1 / R2)
FIGURE 8. Decreasing VTT by Level Shifting
HSTL APPLICATIONS
The TJ2997 can be easily adapted for HSTL applications by connecting VDDQ to the 1.5V rail. This will
produce a VTT and VREF voltage of approximately 0.75V for the termination resistors. It is possible to
connect PVIN to higher than a 2.5V rail for higher source/sink current. Care should be taken to do not
exceed the maximum junction temperature as the thermal dissipation increases with lower VTT output
voltages (For more information, refer to the Thermal Dissipation section.). The advantage of this
Apr, 2011 - R1.0.1
11/13
HTC
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet TJ2997.PDF ] | |
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