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부품번호 | AJAV-5508 기능 |
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기능 | Power Amplifier | ||
제조업체 | AVAGO | ||
로고 | |||
전체 6 페이지수
AJAV-5508
W-CDMA/HSPA Band VIII Power Amplifier
Data Sheet
Description
The AJAV-5508 is a complete, high-performance power
amplifier for W-CDMA and HSPA wireless communica-
tions. Based on a unique, patented architecture, the AJAV-
5508 integrates circuitry for TX filtering, RF coupling,
power regulation, input and output matching and power
control. The PA is powered by a single connection to the
battery and is implemented in a standard CMOS process.
Pin Assignments
Top View (x-ray)
VBAT
RFI
VM1
VM0
VEN
GND
PAD
VBAT
RFO
CPLI
GND
CPLO
US Patent # 7,728,661; 7,768,350;
7,872,528; 8,022,766
Other patents pending
Functional Block Diagram
Features
• High-performance 3G power amplifier
- UMTS Band VIII (880 - 915 MHz)
- W-CDMA, HSPA, and HSPA+ Compliant
• Integrated TX filtering
- Delivers best noise in the industry
• Integrated directional coupler
• Integrated regulators and PA bias
• Single direct connection to the battery
- No external switches or isolation inductors
• MIPI control interface (optional)
• High linear efficiency
• Low average current
• High capacity CMOS process
• Small 3×3 mm DFN package
Applications
• Smartphones, data cards and 3G modules
• Tablets, netbooks and network PCs
• E-books and wireless electronic readers
Top View
VBAT
AJAV-5508
REGULATOR/BIAS
RFI
INPUT
MATCH
PA
CONTROL
VM0 VM1 VEN
OUTPUT
MATCH
MIPI
CONTROL
(OPTIONAL)
RFO
CPLI
CPLO
Free Datasheet http://www.datasheet4u.com/
Application Information
Low current <10 µA
Pin 1 can be directly
connected to VBAT
VBAT 1
RF IN 2
VM1 3
4
VM0
5
VEN
VBAT
RFI
VM1
VM0
VEN
4.7 µF
0603
VBAT
AJAV-5508
VBAT 10
RFO 9
CPLI 8
GND 7
CPLO 6
GND Paddle
10 pF
0402
RF OUT
CPLI
CPLO
Figure 1. Typical Single-Band Application Circuit
The AJAV-5508 is the world’s first 3G Band VIII power am-
plifier (PA) implemented in a standard CMOS process. The
AJAV-5508 delivers low current and integrates TX filtering
that produces the best noise in the industry. Only a single
RF bypass capacitor is required, enabling a very low bill-
of-materials (BOM). The AJAV-5508 is fully compliant with
W-CDMA, HSPA, and HSPA+ standards through 3GPP Re-
lease 7 and supports Power Class 3 and 4.
Figure 1 shows the typical application circuit. The AJAV-
5508 supports three power modes controlled by a stan-
dard CMOS interface enabling a direct connection to the
baseband with no level shifters. The VEN, VM0 and VM1
power control pins are high impedance with logic levels
defined in Table 2.
The AJAV-5508 may be powered by a single direct con-
nection to the battery, or controlled with an external DC/
DC converter. All power supply current flows through pin
10. Pin 1 is a low current input that can be directly con-
nected to VBAT or any other high level signal. No external
switches, isolation inductors, or bypass capacitors are re-
quired on Pin 1.
Standard RF practice should be followed for the PCB layout
of the RF traces for pins 2, 6, 8, and 9. Multiple vias should
be placed underneath the GND paddle to create a low re-
sistance path to ground and to ensure good heat conduc-
tion. Refer to Application Note 5565, (AV02-4080EN) AJAV-
5xxx PCB Guidelines, for additional information.
The AJAV-5508 features an integrated directional coupler
that can be daisy-chained through the CPLI and CPLO
ports. For best performance, at least one port should see
a 50 Ω path to GND. The CPLI port accepts an RF input or
can be terminated. The CPLO port provides the coupled
RF output that can be passed to the RF detector, termi-
nated, or passed to the next PA in the daisy chain.
The AJAV-5508 includes integrated TX filtering that en-
sures excellent receiver sensitivity. As the RF signal passes
through the PA, the unwanted out-of-band noise pro-
duced by the transceiver is filtered out. Furthermore, the
thermal noise at the PA output is greatly reduced below
the level of a conventional GaAs PA. The resulting signal
at the output of the AJAV-5508 is spectrally very clean, en-
suring the best receiver sensitivity and producing minimal
interference to other radios in the system.
The JAV5508 integrates the RF Front-End Control Interface
(RFFE) Version 1.1 from the MIPI Alliance. This optional in-
terface is available for advanced features, including power
control. For additional information on using the MIPI in-
terface, please contact your Avago support.
4
Free Datasheet http://www.datasheet4u.com/
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DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |